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Date:   Fri, 12 May 2023 00:37:49 +0300
From:   Vladimir Oltean <olteanv@gmail.com>
To:     alexis.lothore@bootlin.com
Cc:     andrew@lunn.ch, f.fainelli@gmail.com, davem@davemloft.net,
        edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
        linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
        herve.codina@bootlin.com, miquel.raynal@bootlin.com,
        milan.stevanovic@se.com, jimmy.lalande@se.com,
        pascal.eberhard@se.com
Subject: Re: [PATCH net v2 2/3] net: dsa: rzn1-a5psw: fix STP states handling
Message-ID: <20230511213749.j2be7po5n2vgfwmu@skbuf>
References: <20230511170202.742087-1-alexis.lothore@bootlin.com>
 <20230511170202.742087-3-alexis.lothore@bootlin.com>
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On Thu, May 11, 2023 at 07:02:01PM +0200, alexis.lothore@bootlin.com wrote:
> From: Cl?ment L?ger <clement.leger@bootlin.com>
> 
> stp_set_state() should actually allow receiving BPDU while in LEARNING
> mode which is not the case. Additionally, the BLOCKEN bit does not
> actually forbid sending forwarded frames from that port. To fix this, add
> a5psw_port_tx_enable() function which allows to disable TX. However, while
> its name suggest that TX is totally disabled, it is not and can still
> allow to send BPDUs even if disabled. This can be done by using forced
> forwarding with the switch tagging mechanism but keeping "filtering"
> disabled (which is already the case in the rzn1-a5sw tag driver). With
> these fixes, STP support is now functional.
> 
> Fixes: 888cdb892b61 ("net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver")
> Signed-off-by: Cl?ment L?ger <clement.leger@bootlin.com>
> Signed-off-by: Alexis Lothor? <alexis.lothore@bootlin.com>
> ---

Reviewed-by: Vladimir Oltean <olteanv@gmail.com>

> @@ -344,28 +376,35 @@ static void a5psw_port_bridge_leave(struct dsa_switch *ds, int port,
>  
>  static void a5psw_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
>  {
> -	u32 mask = A5PSW_INPUT_LEARN_DIS(port) | A5PSW_INPUT_LEARN_BLOCK(port);
>  	struct a5psw *a5psw = ds->priv;
> -	u32 reg = 0;
> +	bool learning_enabled, rx_enabled, tx_enabled;

Absolutely minor comment: in the networking subsystem there is a coding
style preference to order lines with variable declarations longest to
shortest (reverse Christmas tree). Since I don't see another less
frivolous reason to resend the patch set, I thought I'd just mention
for next time.