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From:   Junhao He <hejunhao3@huawei.com>
To:     <mathieu.poirier@linaro.org>, <suzuki.poulose@arm.com>,
        <mike.leach@linaro.org>, <leo.yan@linaro.org>,
        <jonathan.cameron@huawei.com>
CC:     <coresight@lists.linaro.org>, <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-doc@vger.kernel.org>, <linuxarm@huawei.com>,
        <yangyicong@huawei.com>, <shenyang39@huawei.com>,
        <prime.zeng@hisilicon.com>, <hejunhao3@huawei.com>
Subject: [PATCH] coresight: etm4x: fix trctraceid sysfs always invisible
Date:   Fri, 12 May 2023 10:39:33 +0800
Message-ID: <20230512023933.961-1-hejunhao3@huawei.com>
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Precedence: bulk

The trctraceid sysfs interface is current in etm4x mgmt group.
Each attr in the mgmt group will call the function is_visible()
to check whether the register is implemented. However the trctraceid
does not bound to any register. So the trctraceid sysfs will
always be invisible.

Move it to etmv4 group to fix that.

Fixes: df4871204e5d ("coresight: etm4x: Update ETM4 driver to use Trace ID API")
Signed-off-by: Junhao He <hejunhao3@huawei.com>
---
 .../coresight/coresight-etm4x-sysfs.c         | 42 +++++++++----------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
index 5e62aa40ecd0..0ea71de0f56b 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
@@ -2335,6 +2335,26 @@ static ssize_t ts_source_show(struct device *dev,
 }
 static DEVICE_ATTR_RO(ts_source);
 
+/*
+ * Trace ID allocated dynamically on enable - but also allocate on read
+ * in case sysfs or perf read before enable to ensure consistent metadata
+ * information for trace decode
+ */
+static ssize_t trctraceid_show(struct device *dev,
+			       struct device_attribute *attr,
+			       char *buf)
+{
+	int trace_id;
+	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+	trace_id = etm4_read_alloc_trace_id(drvdata);
+	if (trace_id < 0)
+		return trace_id;
+
+	return sysfs_emit(buf, "0x%x\n", trace_id);
+}
+static DEVICE_ATTR_RO(trctraceid);
+
 static struct attribute *coresight_etmv4_attrs[] = {
 	&dev_attr_nr_pe_cmp.attr,
 	&dev_attr_nr_addr_cmp.attr,
@@ -2390,29 +2410,10 @@ static struct attribute *coresight_etmv4_attrs[] = {
 	&dev_attr_vmid_masks.attr,
 	&dev_attr_cpu.attr,
 	&dev_attr_ts_source.attr,
+	&dev_attr_trctraceid.attr,
 	NULL,
 };
 
-/*
- * Trace ID allocated dynamically on enable - but also allocate on read
- * in case sysfs or perf read before enable to ensure consistent metadata
- * information for trace decode
- */
-static ssize_t trctraceid_show(struct device *dev,
-			       struct device_attribute *attr,
-			       char *buf)
-{
-	int trace_id;
-	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
-
-	trace_id = etm4_read_alloc_trace_id(drvdata);
-	if (trace_id < 0)
-		return trace_id;
-
-	return sysfs_emit(buf, "0x%x\n", trace_id);
-}
-static DEVICE_ATTR_RO(trctraceid);
-
 struct etmv4_reg {
 	struct coresight_device *csdev;
 	u32 offset;
@@ -2549,7 +2550,6 @@ static struct attribute *coresight_etmv4_mgmt_attrs[] = {
 	coresight_etm4x_reg(trcpidr3, TRCPIDR3),
 	coresight_etm4x_reg(trcoslsr, TRCOSLSR),
 	coresight_etm4x_reg(trcconfig, TRCCONFIGR),
-	&dev_attr_trctraceid.attr,
 	coresight_etm4x_reg(trcdevarch, TRCDEVARCH),
 	NULL,
 };
-- 
2.33.0