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charset="iso-8859-2" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYBPR01MB5341.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1b94dd63-061a-475e-0b61-08db52cf15a2 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 May 2023 09:55:57.7239 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: O4jdGgTMMR8XjXRikVFcSW6pQvugtsr28HoE0AeWxgR//QJ0iKjcVBYvHU73d4vQEkhJNwMZZT6y6bbHGpXYujX2gsjef8gI42cfD+dhwcnh9feEpPbM3X8GGMylVyaC X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYCPR01MB9669 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Serge, > From: Serge Semin, Sent: Friday, May 12, 2023 4:09 AM >=20 > Most likely by mistake the PORT_LINK_FAST_LINK_MODE flag unsetting was > added twice in the commit cff9244432e8 ("PCI: dwc: Ensure FAST_LINK_MODE > is cleared"): first it is cleared right after the content of the > PCIE_PORT_LINK_CONTROL register is read, second it's cleared in the > framework of the link-mode initialization procedure. The later action is > redundant. Let's drop it. >=20 > Signed-off-by: Serge Semin > Reviewed-by: Manivannan Sadhasivam I'm not sure whether my review is useful or not, but anyway, Reviewed-by: Yoshihiro Shimoda Best regards, Yoshihiro Shimoda > --- > drivers/pci/controller/dwc/pcie-designware.c | 1 - > 1 file changed, 1 deletion(-) >=20 > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/c= ontroller/dwc/pcie-designware.c > index 8e33e6e59e68..e55b7b387eb6 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -1019,7 +1019,6 @@ void dw_pcie_setup(struct dw_pcie *pci) > } >=20 > /* Set the number of lanes */ > - val &=3D ~PORT_LINK_FAST_LINK_MODE; > val &=3D ~PORT_LINK_MODE_MASK; > switch (pci->num_lanes) { > case 1: > -- > 2.40.0 >=20