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[82.37.195.13]) by smtp.gmail.com with ESMTPSA id t14-20020a5d460e000000b003047ae72b14sm23588654wrq.82.2023.05.12.07.00.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 May 2023 07:00:53 -0700 (PDT) Date: Fri, 12 May 2023 15:00:51 +0100 From: Daniel Thompson To: Douglas Anderson Cc: Catalin Marinas , Will Deacon , Sumit Garg , Marc Zyngier , Mark Rutland , ito-yuichi@fujitsu.com, kgdb-bugreport@lists.sourceforge.net, Chen-Yu Tsai , Masayoshi Mizuma , Peter Zijlstra , Ard Biesheuvel , "Rafael J . Wysocki" , linux-arm-kernel@lists.infradead.org, Stephen Boyd , Lecopzer Chen , Thomas Gleixner , linux-perf-users@vger.kernel.org, Alexandru Elisei , Masayoshi Mizuma , linux-kernel@vger.kernel.org Subject: Re: [PATCH v8 09/10] arm64: kgdb: Roundup cpus using IPI as NMI Message-ID: <20230512140051.GA217273@aspen.lan> References: <20230419225604.21204-1-dianders@chromium.org> <20230419155341.v8.9.I2ef26d1b3bfbed2d10a281942b0da7d9854de05e@changeid> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230419155341.v8.9.I2ef26d1b3bfbed2d10a281942b0da7d9854de05e@changeid> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 19, 2023 at 03:56:03PM -0700, Douglas Anderson wrote: > From: Sumit Garg > > arm64 platforms with GICv3 or later supports pseudo NMIs which can be > leveraged to roundup CPUs which are stuck in hard lockup state with > interrupts disabled that wouldn't be possible with a normal IPI. > > So instead switch to roundup CPUs using IPI turned as NMI. And in > case a particular arm64 platform doesn't supports pseudo NMIs, > it will switch back to default kgdb CPUs roundup mechanism. > > Signed-off-by: Sumit Garg > Tested-by: Chen-Yu Tsai > Signed-off-by: Douglas Anderson > --- > > (no changes since v1) > > arch/arm64/kernel/ipi_nmi.c | 5 +++++ > arch/arm64/kernel/kgdb.c | 18 ++++++++++++++++++ > 2 files changed, 23 insertions(+) > > diff --git a/arch/arm64/kernel/ipi_nmi.c b/arch/arm64/kernel/ipi_nmi.c > index c592e92b8cbf..2adaaf1519e5 100644 > --- a/arch/arm64/kernel/ipi_nmi.c > +++ b/arch/arm64/kernel/ipi_nmi.c > @@ -8,6 +8,7 @@ > > #include > #include > +#include > #include > #include > > @@ -45,10 +46,14 @@ bool arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self) > static irqreturn_t ipi_nmi_handler(int irq, void *data) > { > irqreturn_t ret = IRQ_NONE; > + unsigned int cpu = smp_processor_id(); Does this play nice with CONFIG_DEBUG_PREEMPT? I may have missed something about the NMI entry but a quick scan of the arm64 arch_irq_disabled() suggests that debug_smp_processor_id() will issue warnings at this point... Other than I didn't see anything I don't like here. Daniel.