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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2023 02:06:29.9520 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0dc4b180-bd07-444d-1376-08db5356aac6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7371 X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/12/23 07:42, Ard Biesheuvel wrote: >> I'm still not sure of how to make room, but working on it. >> > > The assumption that only the linear map needs to be covered by struct > pages is rather fundamental to the arm64 mm code, as far as I am > aware. > > Given that these device memory regions have no direct correspondence > with the linear map at all, couldn't we simply vmalloc() a range of > memory for struct pages for such a region and wire that up in the > existing code? That seems far more maintainable to me than > reorganizing the entire kernel VA space, and only for some choices for > the dimensions. The vmalloc approach does sound like it should Just Work, yes. I'll try it out. And now I'm trying to remember why Jerome didn't use that approach for x86 originally. If this fixes HMM on arm64, I'll revisit that question too. Really appreciate the help and advice here. thanks, -- John Hubbard NVIDIA