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Date:   Sun, 14 May 2023 23:01:39 +0200
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Subject: Re: [PATCH v2] ARM: dts: meson8: correct uart_B and uart_C clock
 references
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To:     Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
        linux-amlogic@lists.infradead.org
Cc:     linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        neil.armstrong@linaro.org
References: <20230514201909.506090-1-martin.blumenstingl@googlemail.com>
From:   Hans-Frieder Vogt <hfdevel@gmx.net>
In-Reply-To: <20230514201909.506090-1-martin.blumenstingl@googlemail.com>
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Precedence: bulk

On 14.05.2023 22.19, Martin Blumenstingl wrote:
> On Meson8 uart_B and uart_C do not work, because they are relying on
> incorrect clocks. Change the references of pclk to the correct CLKID
> (UART1 for uart_B and UART2 for uart_C), to allow use of the two uarts.
>
> This was originally reported by Hans-Frieder Vogt for Meson8b [0], but
> the same bug is also present in meson8.dtsi
>
> [0] https://lore.kernel.org/linux-amlogic/trinity-bf20bcb9-790b-4ab9-99e=
3-0831ef8257f4-1680878185420@3c-app-gmx-bap55/
>
> Fixes: 57007bfb5469 ("ARM: dts: meson8: Fix the UART device-tree schema =
validation")
> Reported-by: Hans-Frieder Vogt <hfdevel@gmx.net> # for meson8b.dtsi
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> Changes since v1:
> - move the link to the original report for Meson8b to the description
>
>
>   arch/arm/boot/dts/meson8.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dt=
si
> index 4f22ab451aae..1054297fa69f 100644
> --- a/arch/arm/boot/dts/meson8.dtsi
> +++ b/arch/arm/boot/dts/meson8.dtsi
> @@ -769,13 +769,13 @@ &uart_A {
>
>   &uart_B {
>   	compatible =3D "amlogic,meson8-uart";
> -	clocks =3D <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
> +	clocks =3D <&xtal>, <&clkc CLKID_UART2>, <&clkc CLKID_CLK81>;
Shouldn't the second clock reference for uart_B rather be CLKID_UART1,
similar to meson8b?
Sorry, didn't spot this earlier.
>   	clock-names =3D "xtal", "pclk", "baud";
>   };
>
>   &uart_C {
>   	compatible =3D "amlogic,meson8-uart";
> -	clocks =3D <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
> +	clocks =3D <&xtal>, <&clkc CLKID_UART2>, <&clkc CLKID_CLK81>;
>   	clock-names =3D "xtal", "pclk", "baud";
>   };
>