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Date:   Mon, 15 May 2023 11:16:01 +0800
From:   Shawn Guo <shawnguo@kernel.org>
To:     Adam Ford <aford173@gmail.com>
Cc:     linux-arm-kernel@lists.infradead.org, marex@denx.de,
        aford@beaconembedded.com, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mp: Fix video clock parents
Message-ID: <20230515031601.GD767028@dragon>
References: <20230512010423.1227793-1-aford173@gmail.com>
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On Thu, May 11, 2023 at 08:04:23PM -0500, Adam Ford wrote:
> There are a few clocks whose parents are set in mipi_dsi
> and lcdif nodes, but these clocks are used by the media_blk_ctrl
> power domain.  This may cause an issue when re-parenting, because
> the media_blk_ctrl may start the clocks before the reparent is
> done resulting in a disp_pixel clock having the wrong parent and
> rate.
> 
> Fix this by moving the assigned-clock-parents and rates to the
> media_blk_ctrl node to configure these clocks before they are enabled.
> 
> After this patch, both disp1_pix_root and dixp2_pix_root clock
> become children of the video_pll1.
> 
> video_pll1_ref_sel           24000000
>   video_pll1               1039500000
>     video_pll1_bypass        1039500000
>       video_pll1_out           1039500000
>         media_disp2_pix          1039500000
>           media_disp2_pix_root_clk   1039500000
>         media_disp1_pix          1039500000
>           media_disp1_pix_root_clk   1039500000
> 
> Fixes: eda09fe149df ("arm64: dts: imx8mp: Add display pipeline components")
> Signed-off-by: Adam Ford <aford173@gmail.com>

Applied, thanks!