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Date:   Mon, 15 May 2023 10:36:08 +0100
From:   Sudeep Holla <sudeep.holla@arm.com>
To:     Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc:     Radu Rendec <rrendec@redhat.com>, linux-kernel@vger.kernel.org,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>,
        Pierre Gondois <Pierre.Gondois@arm.com>,
        Sudeep Holla <sudeep.holla@arm.com>,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 1/3] cacheinfo: Add arch specific early level
 initializer
Message-ID: <20230515093608.etfprpqn3lmgybe6@bogus>
References: <20230412185759.755408-1-rrendec@redhat.com>
 <20230412185759.755408-2-rrendec@redhat.com>
 <20230510191207.GA18514@ranerica-svr.sc.intel.com>
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On Wed, May 10, 2023 at 12:12:07PM -0700, Ricardo Neri wrote:
> Hi,
> 
> I had posted a patchset[1] for x86 that initializes
> ci_cacheinfo(cpu)->num_leaves during SMP boot.
>

It is entirely clear to me if this is just a clean up or a fix to some
issue you faced ? Just wanted to let you know Prateek from AMD has couple
of fixes [2]

> This means that early_leaves and a late cache_leaves() are equal but
> per_cpu_cacheinfo(cpu) is never allocated. Currently, x86 does not use
> fetch_cache_info().
> 
> I think that we should check here that per_cpu_cacheinfo() has been allocated to
> take care of the case in which early and late cache leaves remain the same:
> 
> -       if (cache_leaves(cpu) <= early_leaves)
> +       if (cache_leaves(cpu) <= early_leaves && per_cpu_cacheinfo(cpu))
> 
> Otherwise, in v6.4-rc1 + [1] I observe a NULL pointer dereference from
> last_level_cache_is_valid().
>

I think this is different issue as Prateek was just observing wrong info
after cpuhotplug operations. But the patches manage the cpumap_populated
state better with the patches. Can you please look at that as weel ?

-- 
Regards,
Sudeep

[2] https://lore.kernel.org/all/20230508084115.1157-1-kprateek.nayak@amd.com