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Mon, 15 May 2023 14:42:39 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4949420043; Mon, 15 May 2023 14:42:39 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DF9C920040; Mon, 15 May 2023 14:42:36 +0000 (GMT) Received: from [9.171.65.23] (unknown [9.171.65.23]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 15 May 2023 14:42:36 +0000 (GMT) Message-ID: Subject: Re: [PATCH v9 5/6] iommu/dma: Allow a single FQ in addition to per-CPU FQs From: Niklas Schnelle To: Jason Gunthorpe , Robin Murphy Cc: Joerg Roedel , Matthew Rosato , Will Deacon , Wenjia Zhang , Gerd Bayer , Julian Ruess , Pierre Morel , Alexandra Winter , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Suravee Suthikulpanit , Hector Martin , Sven Peter , Alyssa Rosenzweig , David Woodhouse , Lu Baolu , Andy Gross , Bjorn Andersson , Konrad Dybcio , Yong Wu , Matthias Brugger , AngeloGioacchino Del Regno , Gerald Schaefer , Orson Zhai , Baolin Wang , Chunyan Zhang , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Thierry Reding , Krishna Reddy , Jonathan Hunter , Jonathan Corbet , linux-s390@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, linux-doc@vger.kernel.org Date: Mon, 15 May 2023 16:42:36 +0200 In-Reply-To: References: <20230310-dma_iommu-v9-0-65bb8edd2beb@linux.ibm.com> <20230310-dma_iommu-v9-5-65bb8edd2beb@linux.ibm.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.48.1 (3.48.1-1.fc38) X-TM-AS-GCONF: 00 X-Proofpoint-GUID: gNuxWXJsmokdhsaD92T6yUFS_UMSNhrG X-Proofpoint-ORIG-GUID: me_7t4m8_jWebgWrnvUvQ84qdxzJLwc5 Content-Transfer-Encoding: quoted-printable X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-15_11,2023-05-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 mlxscore=0 suspectscore=0 mlxlogscore=596 bulkscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305150121 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2023-05-15 at 10:07 -0300, Jason Gunthorpe wrote: > On Mon, May 15, 2023 at 11:15:55AM +0200, Niklas Schnelle wrote: >=20 > > +/** > > + * struct dma_iommu_options - Options for dma-iommu > > + * > > + * @flags: Flag bits for enabling/disabling dma-iommu settings > > + * > > + * This structure is intended to provide IOMMU drivers a way to influe= nce the > > + * behavior of the dma-iommu DMA API implementation. This allows optim= izing for > > + * example for a virtualized environment with slow IOTLB flushes. > > + */ > > +struct dma_iommu_options { > > +#define IOMMU_DMA_OPTS_PER_CPU_QUEUE (0L << 0) > > +#define IOMMU_DMA_OPTS_SINGLE_QUEUE (1L << 0) > > + u64 flags; > > +}; >=20 > You need to hash it out with robin if we do something like this or use > more untyped caps as he put in this series: >=20 > https://lore.kernel.org/linux-iommu/cover.1683233867.git.robin.murphy@arm= .com/ >=20 > Jason Ok. I do wonder how to best represent this as a capability. Semantically I think a capability needs to be something positive i.e. while IOMMU_CAP_EXPENSIVE_FLUSH would technically work having slow IOTLB flushes really isn't a capability. So the best I can think of is maybe IOMMU_CAP_SHADOW_ON_FLUSH. It's a bit specific but does convey that the IOTLB flush does more than dropping hardware caches where the main cost is the then empty TLB not the operation itself. Or maybe to keep thing separate one would have to add capabilities for the existing users IOMMU_CAP_HW_FLUSH and IOMMU_CAP_CONCURRENT_FLUSH. Not sure though. It does feel more clunky than the tuning op I added and maybe instead these mechanisms should co-exist. After all even though the IOTLB flushes with shadowing are expensive they still benefit from the flush queue just with more entries and less parallelism. Thanks, Niklas