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Tue, 16 May 2023 05:16:47 +0000 Received: from PUZP153MB0749.APCP153.PROD.OUTLOOK.COM ([fe80::1cc2:aa38:1d02:9a11]) by PUZP153MB0749.APCP153.PROD.OUTLOOK.COM ([fe80::1cc2:aa38:1d02:9a11%2]) with mapi id 15.20.6433.001; Tue, 16 May 2023 05:16:47 +0000 From: Saurabh Singh Sengar To: Tianyu Lan , "luto@kernel.org" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "hpa@zytor.com" , "seanjc@google.com" , "pbonzini@redhat.com" , "jgross@suse.com" , Tianyu Lan , "kirill@shutemov.name" , "jiangshan.ljs@antgroup.com" , "peterz@infradead.org" , "ashish.kalra@amd.com" , "srutherford@google.com" , "akpm@linux-foundation.org" , "anshuman.khandual@arm.com" , "pawan.kumar.gupta@linux.intel.com" , "adrian.hunter@intel.com" , "daniel.sneddon@linux.intel.com" , "alexander.shishkin@linux.intel.com" , "sandipan.das@amd.com" , "ray.huang@amd.com" , "brijesh.singh@amd.com" , "michael.roth@amd.com" , "thomas.lendacky@amd.com" , "venu.busireddy@oracle.com" , "sterritt@google.com" , "tony.luck@intel.com" , "samitolvanen@google.com" , "fenghua.yu@intel.com" CC: "pangupta@amd.com" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , "linux-hyperv@vger.kernel.org" , "linux-arch@vger.kernel.org" Subject: RE: [EXTERNAL] [RFC PATCH V6 13/14] x86/hyperv: Add smp support for sev-snp guest Thread-Topic: [EXTERNAL] [RFC PATCH V6 13/14] x86/hyperv: Add smp support for sev-snp guest Thread-Index: AQHZh07yGnCc2IeLu0KwFAqll07cNq9cWnvw Date: Tue, 16 May 2023 05:16:47 +0000 Message-ID: References: <20230515165917.1306922-1-ltykernel@gmail.com> <20230515165917.1306922-14-ltykernel@gmail.com> In-Reply-To: <20230515165917.1306922-14-ltykernel@gmail.com> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=45694349-e327-4f6a-8743-a806ad73b8eb;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2023-05-16T05:09:10Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PUZP153MB0749.APCP153.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: 6f5e1c2c-f2e2-4f8f-00cb-08db55ccbf53 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2023 05:16:47.4330 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zrpfr/buXANVA0tA+DM0INeagkJbKyuIdIE4bhFlchD/bbITI/ZjFqLZrnvWJS8r0mMR9QLQKHbDP7fo2zSuCA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PUZP153MB0728 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Tianyu Lan > Sent: Monday, May 15, 2023 10:29 PM > To: luto@kernel.org; tglx@linutronix.de; mingo@redhat.com; bp@alien8.de; > dave.hansen@linux.intel.com; x86@kernel.org; hpa@zytor.com; > seanjc@google.com; pbonzini@redhat.com; jgross@suse.com; Tianyu Lan > ; kirill@shutemov.name; > jiangshan.ljs@antgroup.com; peterz@infradead.org; ashish.kalra@amd.com; > srutherford@google.com; akpm@linux-foundation.org; > anshuman.khandual@arm.com; pawan.kumar.gupta@linux.intel.com; > adrian.hunter@intel.com; daniel.sneddon@linux.intel.com; > alexander.shishkin@linux.intel.com; sandipan.das@amd.com; > ray.huang@amd.com; brijesh.singh@amd.com; michael.roth@amd.com; > thomas.lendacky@amd.com; venu.busireddy@oracle.com; > sterritt@google.com; tony.luck@intel.com; samitolvanen@google.com; > fenghua.yu@intel.com > Cc: pangupta@amd.com; linux-kernel@vger.kernel.org; kvm@vger.kernel.org; > linux-hyperv@vger.kernel.org; linux-arch@vger.kernel.org > Subject: [EXTERNAL] [RFC PATCH V6 13/14] x86/hyperv: Add smp support for > sev-snp guest >=20 > From: Tianyu Lan >=20 > The wakeup_secondary_cpu callback was populated with wakeup_ > cpu_via_vmgexit() which doesn't work for Hyper-V and Hyper-V requires to > call Hyper-V specific hvcall to start APs. So override it with Hyper-V sp= ecific > hook to start AP sev_es_save_area data structure. >=20 > Signed-off-by: Tianyu Lan > --- > Change since RFC v5: > * Remove some redundant structure definitions >=20 > Change sicne RFC v3: > * Replace struct sev_es_save_area with struct > vmcb_save_area > * Move code from mshyperv.c to ivm.c >=20 > Change since RFC v2: > * Add helper function to initialize segment > * Fix some coding style > --- > arch/x86/hyperv/ivm.c | 98 +++++++++++++++++++++++++++++++ > arch/x86/include/asm/mshyperv.h | 10 ++++ > arch/x86/kernel/cpu/mshyperv.c | 13 +++- > include/asm-generic/hyperv-tlfs.h | 3 +- > 4 files changed, 121 insertions(+), 3 deletions(-) >=20 > diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c index > 85e4378f052f..b7b8e1ba8223 100644 > --- a/arch/x86/hyperv/ivm.c > +++ b/arch/x86/hyperv/ivm.c > @@ -22,11 +22,15 @@ > #include > #include > #include > +#include >=20 > #ifdef CONFIG_AMD_MEM_ENCRYPT >=20 > #define GHCB_USAGE_HYPERV_CALL 1 >=20 > +static u8 ap_start_input_arg[PAGE_SIZE] __bss_decrypted > +__aligned(PAGE_SIZE); static u8 ap_start_stack[PAGE_SIZE] > +__aligned(PAGE_SIZE); > + > union hv_ghcb { > struct ghcb ghcb; > struct { > @@ -443,6 +447,100 @@ __init void hv_sev_init_mem_and_cpu(void) > } > } >=20 > +#define hv_populate_vmcb_seg(seg, gdtr_base) \ > +do { \ > + if (seg.selector) { \ > + seg.base =3D 0; \ > + seg.limit =3D HV_AP_SEGMENT_LIMIT; \ > + seg.attrib =3D *(u16 *)(gdtr_base + seg.selector + 5); \ > + seg.attrib =3D (seg.attrib & 0xFF) | ((seg.attrib >> 4) & 0xF00); \ > + } \ > +} while (0) \ > + > +int hv_snp_boot_ap(int cpu, unsigned long start_ip) { > + struct sev_es_save_area *vmsa =3D (struct sev_es_save_area *) > + __get_free_page(GFP_KERNEL | __GFP_ZERO); > + struct desc_ptr gdtr; > + u64 ret, rmp_adjust, retry =3D 5; > + struct hv_enable_vp_vtl *start_vp_input; > + unsigned long flags; > + > + native_store_gdt(&gdtr); > + > + vmsa->gdtr.base =3D gdtr.address; > + vmsa->gdtr.limit =3D gdtr.size; > + > + asm volatile("movl %%es, %%eax;" : "=3Da" (vmsa->es.selector)); > + hv_populate_vmcb_seg(vmsa->es, vmsa->gdtr.base); > + > + asm volatile("movl %%cs, %%eax;" : "=3Da" (vmsa->cs.selector)); > + hv_populate_vmcb_seg(vmsa->cs, vmsa->gdtr.base); > + > + asm volatile("movl %%ss, %%eax;" : "=3Da" (vmsa->ss.selector)); > + hv_populate_vmcb_seg(vmsa->ss, vmsa->gdtr.base); > + > + asm volatile("movl %%ds, %%eax;" : "=3Da" (vmsa->ds.selector)); > + hv_populate_vmcb_seg(vmsa->ds, vmsa->gdtr.base); > + > + vmsa->efer =3D native_read_msr(MSR_EFER); > + > + asm volatile("movq %%cr4, %%rax;" : "=3Da" (vmsa->cr4)); > + asm volatile("movq %%cr3, %%rax;" : "=3Da" (vmsa->cr3)); > + asm volatile("movq %%cr0, %%rax;" : "=3Da" (vmsa->cr0)); > + > + vmsa->xcr0 =3D 1; > + vmsa->g_pat =3D HV_AP_INIT_GPAT_DEFAULT; > + vmsa->rip =3D (u64)secondary_startup_64_no_verify; > + vmsa->rsp =3D (u64)&ap_start_stack[PAGE_SIZE]; > + > + /* > + * Set the SNP-specific fields for this VMSA: > + * VMPL level > + * SEV_FEATURES (matches the SEV STATUS MSR right shifted 2 bits) > + */; > + vmsa->vmpl =3D 0; > + vmsa->sev_features =3D sev_status >> 2; > + > + /* > + * Running at VMPL0 allows the kernel to change the VMSA bit for a > page > + * using the RMPADJUST instruction. However, for the instruction to > + * succeed it must target the permissions of a lesser privileged > + * (higher numbered) VMPL level, so use VMPL1 (refer to the > RMPADJUST > + * instruction in the AMD64 APM Volume 3). > + */ > + rmp_adjust =3D RMPADJUST_VMSA_PAGE_BIT | 1; > + ret =3D rmpadjust((unsigned long)vmsa, RMP_PG_SIZE_4K, > + rmp_adjust); > + if (ret !=3D 0) { > + pr_err("RMPADJUST(%llx) failed: %llx\n", (u64)vmsa, ret); > + return ret; > + } > + > + local_irq_save(flags); > + start_vp_input =3D > + (struct hv_enable_vp_vtl *)ap_start_input_arg; > + memset(start_vp_input, 0, sizeof(*start_vp_input)); > + start_vp_input->partition_id =3D -1; > + start_vp_input->vp_index =3D cpu; > + start_vp_input->target_vtl.target_vtl =3D ms_hyperv.vtl; > + *(u64 *)&start_vp_input->vp_context =3D __pa(vmsa) | 1; > + > + do { > + ret =3D hv_do_hypercall(HVCALL_START_VP, > + start_vp_input, NULL); > + } while (hv_result(ret) =3D=3D HV_STATUS_TIME_OUT && retry--); can we restore local_irq here ? > + > + if (!hv_result_success(ret)) { > + pr_err("HvCallStartVirtualProcessor failed: %llx\n", ret); > + goto done; No need of goto here. Regards, Saurabh > + } > + > +done: > + local_irq_restore(flags); > + return ret; > +} > + > void __init hv_vtom_init(void) > { > /* > diff --git a/arch/x86/include/asm/mshyperv.h > b/arch/x86/include/asm/mshyperv.h index 84e024ffacd5..9ad2a0f21d68 > 100644 > --- a/arch/x86/include/asm/mshyperv.h > +++ b/arch/x86/include/asm/mshyperv.h > @@ -65,6 +65,13 @@ struct memory_map_entry { > u32 reserved; > }; >=20 > +/* > + * DEFAULT INIT GPAT and SEGMENT LIMIT value in struct VMSA > + * to start AP in enlightened SEV guest. > + */ > +#define HV_AP_INIT_GPAT_DEFAULT 0x0007040600070406ULL > +#define HV_AP_SEGMENT_LIMIT 0xffffffff > + > int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages); i= nt > hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id); int > hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags); @= @ - > 263,6 +270,7 @@ struct irq_domain *hv_create_pci_msi_domain(void); int > hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector, > struct hv_interrupt_entry *entry); > int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry > *entry); > +int hv_snp_boot_ap(int cpu, unsigned long start_ip); >=20 > #ifdef CONFIG_AMD_MEM_ENCRYPT > void hv_ghcb_msr_write(u64 msr, u64 value); @@ -271,6 +279,7 @@ bool > hv_ghcb_negotiate_protocol(void); void hv_ghcb_terminate(unsigned int se= t, > unsigned int reason); void hv_vtom_init(void); void > hv_sev_init_mem_and_cpu(void); > +int hv_snp_boot_ap(int cpu, unsigned long start_ip); > #else > static inline void hv_ghcb_msr_write(u64 msr, u64 value) {} static inli= ne void > hv_ghcb_msr_read(u64 msr, u64 *value) {} @@ -278,6 +287,7 @@ static > inline bool hv_ghcb_negotiate_protocol(void) { return false; } static in= line > void hv_ghcb_terminate(unsigned int set, unsigned int reason) {} static = inline > void hv_vtom_init(void) {} static inline void hv_sev_init_mem_and_cpu(vo= id) > {} > +static int hv_snp_boot_ap(int cpu, unsigned long start_ip) {} > #endif >=20 > extern bool hv_isolation_type_snp(void); diff --git > a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index > dea9b881180b..0c5f9f7bd7ba 100644 > --- a/arch/x86/kernel/cpu/mshyperv.c > +++ b/arch/x86/kernel/cpu/mshyperv.c > @@ -295,6 +295,16 @@ static void __init hv_smp_prepare_cpus(unsigned int > max_cpus) >=20 > native_smp_prepare_cpus(max_cpus); >=20 > + /* > + * Override wakeup_secondary_cpu_64 callback for SEV-SNP > + * enlightened guest. > + */ > + if (hv_isolation_type_en_snp()) > + apic->wakeup_secondary_cpu_64 =3D hv_snp_boot_ap; > + > + if (!hv_root_partition) > + return; > + > #ifdef CONFIG_X86_64 > for_each_present_cpu(i) { > if (i =3D=3D 0) > @@ -502,8 +512,7 @@ static void __init ms_hyperv_init_platform(void) >=20 > # ifdef CONFIG_SMP > smp_ops.smp_prepare_boot_cpu =3D hv_smp_prepare_boot_cpu; > - if (hv_root_partition) > - smp_ops.smp_prepare_cpus =3D hv_smp_prepare_cpus; > + smp_ops.smp_prepare_cpus =3D hv_smp_prepare_cpus; > # endif >=20 > /* > diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hype= rv- > tlfs.h > index f4e4cc4f965f..92dcc530350c 100644 > --- a/include/asm-generic/hyperv-tlfs.h > +++ b/include/asm-generic/hyperv-tlfs.h > @@ -146,9 +146,9 @@ union hv_reference_tsc_msr { > /* Declare the various hypercall operations. */ > #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002 > #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003 > -#define HVCALL_ENABLE_VP_VTL 0x000f > #define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008 > #define HVCALL_SEND_IPI 0x000b > +#define HVCALL_ENABLE_VP_VTL 0x000f > #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013 > #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014 > #define HVCALL_SEND_IPI_EX 0x0015 > @@ -223,6 +223,7 @@ enum HV_GENERIC_SET_FORMAT { > #define HV_STATUS_INVALID_PORT_ID 17 > #define HV_STATUS_INVALID_CONNECTION_ID 18 > #define HV_STATUS_INSUFFICIENT_BUFFERS 19 > +#define HV_STATUS_TIME_OUT 120 > #define HV_STATUS_VTL_ALREADY_ENABLED 134 >=20 > /* > -- > 2.25.1