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Date:   Tue, 16 May 2023 11:35:24 +0200
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Peter De Schrijver <pdeschrijver@nvidia.com>
Cc:     jonathanh@nvidia.com, mperttunen@nvidia.com, sudeep.holla@arm.com,
        talho@nvidia.com, robh@kernel.org, linux-tegra@vger.kernel.org,
        linux-kernel@vger.kernel.org, stefank@nvidia.com,
        krzysztof.kozlowski@linaro.org
Subject: Re: [PATCH v4 6/6] firmware: tegra: bpmp: Add support for DRAM MRQ
 GSCs
Message-ID: <ZGNOXO3rRtFx_12R@orome>
References: <20230511132048.1122075-1-pdeschrijver@nvidia.com>
 <20230511132048.1122075-7-pdeschrijver@nvidia.com>
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On Thu, May 11, 2023 at 04:20:51PM +0300, Peter De Schrijver wrote:
> Implement support for DRAM MRQ GSCs.
>=20
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
>  drivers/firmware/tegra/bpmp-tegra186.c | 232 ++++++++++++++++++-------
>  drivers/firmware/tegra/bpmp.c          |   4 +-
>  2 files changed, 168 insertions(+), 68 deletions(-)
>=20
> diff --git a/drivers/firmware/tegra/bpmp-tegra186.c b/drivers/firmware/te=
gra/bpmp-tegra186.c
> index 2e26199041cd..74575c9f0014 100644
> --- a/drivers/firmware/tegra/bpmp-tegra186.c
> +++ b/drivers/firmware/tegra/bpmp-tegra186.c
> @@ -4,7 +4,9 @@
>   */
> =20
>  #include <linux/genalloc.h>
> +#include <linux/io.h>
>  #include <linux/mailbox_client.h>
> +#include <linux/of_address.h>
>  #include <linux/platform_device.h>
> =20
>  #include <soc/tegra/bpmp.h>
> @@ -13,12 +15,21 @@
> =20
>  #include "bpmp-private.h"
> =20
> +enum tegra_bpmp_mem_type { TEGRA_INVALID, TEGRA_SRAM, TEGRA_DRAM };

Still not convinced about this one.

> +
>  struct tegra186_bpmp {
>  	struct tegra_bpmp *parent;
> =20
>  	struct {
> -		struct gen_pool *pool;
> -		void __iomem *virt;
> +		union {
> +			struct {
> +				void __iomem *virt;
> +				struct gen_pool *pool;
> +			} sram;
> +			struct {
> +				void *virt;
> +			} dram;
> +		};

The drawback of these unions is that they can lead to ambiguity, so you
need the tegra_bpmp_mem_type enum to differentiate between the two.

If you change this to something like:

	struct {
		struct gen_pool *pool;
		void __iomem *sram;
		void *dram;
		dma_addr_t phys;
	} tx, rx;

you eliminate all ambiguity because you can either have pool and sram
set, or you can have dram set, and depending on which are set you know
which type of memory you're dealing with.

Plus you then don't need the extra enum to differentiate between them.

Another alternative would be to use something like:

	union {
		void __iomem *sram;
		void *dram;
	} virt;

if you want to avoid the extra 8 bytes. But to be honest, I wouldn't
bother.

>  		dma_addr_t phys;
>  	} tx, rx;
> =20
> @@ -26,6 +37,8 @@ struct tegra186_bpmp {
>  		struct mbox_client client;
>  		struct mbox_chan *channel;
>  	} mbox;
> +
> +	enum tegra_bpmp_mem_type type;
>  };
> =20
>  static inline struct tegra_bpmp *
> @@ -118,8 +131,17 @@ static int tegra186_bpmp_channel_init(struct tegra_b=
pmp_channel *channel,
>  	queue_size =3D tegra_ivc_total_queue_size(message_size);
>  	offset =3D queue_size * index;
> =20
> -	iosys_map_set_vaddr_iomem(&rx, priv->rx.virt + offset);
> -	iosys_map_set_vaddr_iomem(&tx, priv->tx.virt + offset);
> +	if (priv->type =3D=3D TEGRA_SRAM) {
> +		iosys_map_set_vaddr_iomem(&rx, priv->rx.sram.virt + offset);
> +		iosys_map_set_vaddr_iomem(&tx, priv->tx.sram.virt + offset);
> +	} else if (priv->type =3D=3D TEGRA_DRAM) {
> +		iosys_map_set_vaddr(&rx, priv->rx.dram.virt + offset);
> +		iosys_map_set_vaddr(&tx, priv->tx.dram.virt + offset);
> +	} else {
> +		dev_err(bpmp->dev, "Inconsistent state %d of priv->type detected in %s=
\n",
> +				priv->type, __func__);
> +		return -EINVAL;
> +	}

With an enum you need to do this because theoretically it could happen.
But practically it will never happen and you can just rely on the pool
variable, for example, to distinguish.

Thierry

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