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bh=idFwOkKA0fGw6pFLS5UBe9xd+A2vrOI66qcTi8H6/qw=; b=OIbDQQKJpnD2Hj6xULQHP5CVI7NAjbZiAlOEAYtB2lnu3M2vGbNolmI+g2vUy5rb7e Uqdb7uK1v7CIjlXpQLBWlqqMYHNLDC1USTG0ecmIZsT9lTGNL0uVm27SQfEIioN6vyqs lA14iD4wIu9D5SOIp224WKBDByPjf7EqiMspCF0PuvwryIcTsBnLPO0732F6tdJV6SR4 XLBJyQrRhKwXE7HrEjCNm3oYQvzt0shk3bqfihBni14y9LSa0kqNyu6Rmw5XPYCnbwgv 99S3KGnjaT7GC3ofN7DVXQMd1/CAdd1icFxgxO5UrP2zNYX0jkEjpuwZuu5Uk//vp5C1 uHDQ== X-Gm-Message-State: AC+VfDz9yogpjj9voo2C/JZG7HqDZSzEYQemqxiG6V6//H6wOSfoiSwv XvqeS7YB7IusVou/xd7JRXEbZFMcsSW+50FPlZFc9g== X-Received: by 2002:a67:f4d8:0:b0:434:8e5e:f1de with SMTP id s24-20020a67f4d8000000b004348e5ef1demr14994007vsn.32.1684236874823; Tue, 16 May 2023 04:34:34 -0700 (PDT) MIME-Version: 1.0 References: <20230417125844.400782-1-brgl@bgdev.pl> <20230417125844.400782-5-brgl@bgdev.pl> <3af2f676-66fb-1c10-372f-4fcf6f7d733e@linaro.org> In-Reply-To: <3af2f676-66fb-1c10-372f-4fcf6f7d733e@linaro.org> From: Bartosz Golaszewski Date: Tue, 16 May 2023 13:34:24 +0200 Message-ID: Subject: Re: [PATCH v4 4/5] dt-bindings: iommu: arm,smmu: enable clocks for sa8775p Adreno SMMU To: Krzysztof Kozlowski Cc: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Arnd Bergmann , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 16, 2023 at 12:33=E2=80=AFPM Krzysztof Kozlowski wrote: > > On 16/05/2023 12:07, Bartosz Golaszewski wrote: > > On Mon, Apr 17, 2023 at 2:58=E2=80=AFPM Bartosz Golaszewski wrote: > >> > >> From: Bartosz Golaszewski > >> > >> The GPU SMMU will require the clocks property to be set so put the > >> relevant compatible into the adreno if-then block. > >> > >> Signed-off-by: Bartosz Golaszewski > >> --- > >> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++++-- > >> 1 file changed, 4 insertions(+), 2 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/D= ocumentation/devicetree/bindings/iommu/arm,smmu.yaml > >> index ba677d401e24..53bed0160be8 100644 > >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> @@ -79,6 +79,7 @@ properties: > >> - description: Qcom Adreno GPUs implementing "qcom,smmu-500" an= d "arm,mmu-500" > >> items: > >> - enum: > >> + - qcom,sa8775p-smmu-500 > >> - qcom,sc7280-smmu-500 > >> - qcom,sm6115-smmu-500 > >> - qcom,sm6125-smmu-500 > >> @@ -331,7 +332,9 @@ allOf: > >> properties: > >> compatible: > >> contains: > >> - const: qcom,sc7280-smmu-500 > >> + enum: > >> + - qcom,sa8775p-smmu-500 > >> + - qcom,sc7280-smmu-500 > >> then: > >> properties: > >> clock-names: > >> @@ -413,7 +416,6 @@ allOf: > >> - nvidia,smmu-500 > >> - qcom,qcm2290-smmu-500 > >> - qcom,qdu1000-smmu-500 > >> - - qcom,sa8775p-smmu-500 > >> - qcom,sc7180-smmu-500 > >> - qcom,sc8180x-smmu-500 > >> - qcom,sc8280xp-smmu-500 > >> -- > >> 2.37.2 > >> > > > > Gentle ping for a review and a pick up. The DT patches that use this > > schema are in next now so check_dtbs will now fail. > > I assume this is not for me, as you got my tag in v2, which I repeated > in v3. > > Best regards, > Krzysztof > The patch changed significantly between v2 and v3 which is why I dropped your ack as explained in the cover letter for v3. The response I got for v3 looked like an automated email so I didn't re-collect the tag. If this looks good to you - could you still Ack it officially with the adreno compatible changes? Bart