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Tue, 16 May 2023 07:03:22 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.9.0-alpha0-415-gf2b17fe6c3-fm-20230503.001-gf2b17fe6 Mime-Version: 1.0 Message-Id: In-Reply-To: <20230515181606.65953-9-blarson@amd.com> References: <20230515181606.65953-1-blarson@amd.com> <20230515181606.65953-9-blarson@amd.com> Date: Tue, 16 May 2023 13:03:01 +0200 From: "Arnd Bergmann" To: "Brad Larson" , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, "linux-mmc @ vger . kernel . org" , linux-spi@vger.kernel.org, "Adrian Hunter" , alcooperx@gmail.com, "Andy Shevchenko" , brendan.higgins@linux.dev, "Brian Norris" , "Catalin Marinas" , "Conor Dooley" , "David Gow" , gsomlo@gmail.com, "Greg Ungerer" , "Hal Feng" , "Hitomi Hasegawa" , =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= , "Joel Stanley" , "Emil Renner Berthing" , "Krzysztof Kozlowski" , krzysztof.kozlowski+dt@linaro.org, "Lee Jones" , "Lee Jones" , "Mark Brown" , "Philipp Zabel" , "Randy Dunlap" , "Rob Herring" , "Samuel Holland" , "Serge Semin" , skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, "Tom Lendacky" , "Tony Huang" , "Ulf Hansson" , vaishnav.a@ti.com, "Walker Chen" , "Will Deacon" , "Yinbo Zhu" , devicetree@vger.kernel.org Subject: Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller Content-Type: text/plain X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 15, 2023, at 20:16, Brad Larson wrote: > The Pensando SoC controller is a SPI connected companion device > that is present in all Pensando SoC board designs. The essential > board management registers are accessed on chip select 0 with > board mgmt IO support accessed using additional chip selects. > > Signed-off-by: Brad Larson Hi Brad, I'm sorry I wasn't paying enough attention to this driver as the past 13 revisions went by. > v10 changes: > - Different driver implementation specific to this Pensando controller device. > - Moved to soc/amd directory under new name based on guidance. This driver is > of no use to any design other than all Pensando SoC based cards. > - Removed use of builtin_driver, can be built as a module. it looks like this was a fundamental change that I failed to see. > +# SPDX-License-Identifier: GPL-2.0-only > +menu "AMD Pensando SoC drivers" > + > +config AMD_PENSANDO_CTRL > + tristate "AMD Pensando SoC Controller" > + depends on SPI_MASTER=y > + depends on (ARCH_PENSANDO && OF) || COMPILE_TEST > + default ARCH_PENSANDO > + select REGMAP_SPI > + select MFD_SYSCON > + help > + Enables AMD Pensando SoC controller device support. This is a SPI > + attached companion device in all Pensando SoC board designs which > + provides essential board control/status registers and management IO > + support. So generally speaking, I don't want custom user interfaces in drivers/soc. It looks like this one has internal interfaces for a reset controller and the regmap, so those parts are fine, but I'm confused about the purpose of the ioctl interface: > +static long > +penctrl_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) > +{ > + if (num_msgs > 1) { > + msg++; > + if (msg->len > PENCTRL_MAX_MSG_LEN) { > + ret = -EINVAL; > + goto out_unlock; > + } > + t[1].rx_buf = rx_buf; > + t[1].len = msg->len; > + } > + spi_message_init_with_transfers(&m, t, num_msgs); This seems to be just a passthrough of user space messages, which is what the spidev driver already provides, but using a different ioctl interface. I don't really want any user-level interfaces in drivers/soc as a rule, but having one that duplicates existing functionality seems particularly wrong. Can you explain what the purpose is? Is this about serializing access between the in-kernel reset control and the user-side access? Also, can you explain why this needs a low-lever user interface in the first place, rather than something that can be expressed using high-level abstractions as you already do with the reset control? All of the above should be part of the changelog text to get a driver like this merged. I don't think we can get a quick solution here though, so maybe you can start by removing the ioctl side and having the rest of the driver in drivers/reset? Arnd