Received: by 2002:a05:6358:3188:b0:123:57c1:9b43 with SMTP id q8csp704996rwd; Tue, 16 May 2023 06:51:11 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5C74QXHFc/sxi2Nn6uUTu6jpZMCGO74cdTSTych6ziYsbxUOgSlv/ldog8JPaw7dMixwX8 X-Received: by 2002:a05:6a20:734c:b0:105:3e47:7504 with SMTP id v12-20020a056a20734c00b001053e477504mr11822675pzc.11.1684245071119; Tue, 16 May 2023 06:51:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684245071; cv=none; d=google.com; s=arc-20160816; b=yBnGFKKw1vjo24Ihb56D2M2bzGzzROBz/CFIVQXYdUzeSauYVNW2EWQaRqVPYNnBDU aXjYltKn5sXeSz7ggL0qo6L28o120C9DFA39LzJjuh6CObe9uUBLPieH+Um5c9FMZE3J AtvXVmUkZp4eNSXhH++/D7lQa6btl3ztOnwz9DMpNnGsckjUw/9/393AMLJhxhwpA8Kh 7jKh1iRMRyWnND8FHaj/ZCIFuUnn1+7Q2sW3d85o7zcF1l6ADR57r0TFRgpOIp5yXQ6t sr4Y36ibVozqvYdftuy59S86AcT0TQZZREAtbqevjL1lN7xaYo7b/rVuOB1awLwnCXq+ bg4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=KiJOZ7KFupaQDkC6vwpyzXkB38VvgH/7nK2KElIdK5Q=; b=JM6jM4ji7WtGBuX5USXNZw2rZbuKoq1kyE2ZaJA0Jf5IRRHohw6bhAuLq5c4MT734W SefXpuBwBtTM3+IXq5yuTCx9FzaG9qqP/d/OEG0U5v6ciaITUQWhzVmt1h4Hg0LT23TN U3FFEd+0vRusmRZOQRFywOUyBqbPPzds50a6Wa2BBOl87cm3rx7i80lWLLWeLr5LHKYT bh8/t1QCp6X7KYXydeZ/UInXJ1wfqjJaxVHUE2lan3zUbWgxTkCeyQYPqF1T6rB585w8 lcxswV3qzQqZj5r1MaHt/1142jxS9qn/N/00VBJ6PqXgPy44xEArb7+rKl679owtwDer wxoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=qmxDx+vK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j192-20020a638bc9000000b0052c844f06c1si19192560pge.460.2023.05.16.06.50.55; Tue, 16 May 2023 06:51:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=qmxDx+vK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232874AbjEPNbc (ORCPT + 99 others); Tue, 16 May 2023 09:31:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232641AbjEPNba (ORCPT ); Tue, 16 May 2023 09:31:30 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D7821981; Tue, 16 May 2023 06:31:29 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34GDV1Px029662; Tue, 16 May 2023 08:31:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684243861; bh=KiJOZ7KFupaQDkC6vwpyzXkB38VvgH/7nK2KElIdK5Q=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=qmxDx+vKWF7bJ3554Yy0ba71FC9/2fR6vrCrPeeSZl3jvce7FcmFk6BJoWt7v1/JW tfa1G+VAhjq/FEqTZDLrxRaX876MWicoUDOCAl35rq68ejM1UkvQ/MSoiiiNaF0HN9 Y7QIBDlSmepMghOqmqhD0zIF8Nrnw40ObNtxyrgc= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34GDV1jx020884 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 16 May 2023 08:31:01 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 16 May 2023 08:31:01 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 16 May 2023 08:31:01 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34GDV1wZ031938; Tue, 16 May 2023 08:31:01 -0500 Date: Tue, 16 May 2023 08:31:01 -0500 From: Nishanth Menon To: Siddharth Vadapalli , Peter Rosin , CC: , , , , , , , , , , , , , , , Subject: Re: [PATCH net-next 4/5] arm64: dts: ti: k3-am62-main: Add timesync router node Message-ID: <20230516133101.ezt5jacp6i47nspa@oblivion> References: <20230111114429.1297557-1-s-vadapalli@ti.com> <20230111114429.1297557-5-s-vadapalli@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20230111114429.1297557-5-s-vadapalli@ti.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17:14-20230111, Siddharth Vadapalli wrote: > TI's AM62x SoC has a Time Sync Event Router, which enables routing a single > input signal to multiple recipients. This facilitates syncing all the > peripherals or processor cores to the input signal which acts as a master > clock. > > Signed-off-by: Siddharth Vadapalli > --- > arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > index 072903649d6e..4ce59170b6a7 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > @@ -649,6 +649,15 @@ cpts@3d000 { > }; > }; > > + timesync_router: pinctrl@a40000 { > + compatible = "pinctrl-single"; While I understand that the timesync router is essentially a mux, pinctrl-single is a specific mux model that is used to model external facing pins to internal signals - pin mux sections of control module which is already in place is an example of the same. Using the pinctrl-single scheme for timesync router is, IMHO, wrong and limiting to potential functions that timesync router could need enabling. Is there a reason for using pinctrl-single rather than writing a mux-controller / consumer model driver instead or rather simpler a reg-mux node? > + reg = <0x0 0xa40000 0x0 0x800>; > + #pinctrl-cells = <1>; > + pinctrl-single,register-width = <32>; > + pinctrl-single,function-mask = <0x000107ff>; > + status = "disabled"; > + }; > + -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D