Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   "Tian, Kevin" <kevin.tian@intel.com>
To:     "Chatre, Reinette" <reinette.chatre@intel.com>,
        "jgg@nvidia.com" <jgg@nvidia.com>,
        "yishaih@nvidia.com" <yishaih@nvidia.com>,
        "shameerali.kolothum.thodi@huawei.com" 
        <shameerali.kolothum.thodi@huawei.com>,
        "alex.williamson@redhat.com" <alex.williamson@redhat.com>
CC:     "tglx@linutronix.de" <tglx@linutronix.de>,
        "darwi@linutronix.de" <darwi@linutronix.de>,
        "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
        "Jiang, Dave" <dave.jiang@intel.com>,
        "Liu, Jing2" <jing2.liu@intel.com>,
        "Raj, Ashok" <ashok.raj@intel.com>,
        "Yu, Fenghua" <fenghua.yu@intel.com>,
        "tom.zanussi@linux.intel.com" <tom.zanussi@linux.intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH V5 10/11] vfio/pci: Support dynamic MSI-X
Thread-Topic: [PATCH V5 10/11] vfio/pci: Support dynamic MSI-X
Thread-Index: AQHZhB+IeU7mj6qlzE+Lk1dIkXBe369dwiZw
Date:   Wed, 17 May 2023 02:13:52 +0000
Message-ID: <BN9PR11MB52769B2F4B45E354ED9E2B598C7E9@BN9PR11MB5276.namprd11.prod.outlook.com>
References: <cover.1683740667.git.reinette.chatre@intel.com>
 <956c47057ae9fd45591feaa82e9ae20929889249.1683740667.git.reinette.chatre@intel.com>
In-Reply-To: <956c47057ae9fd45591feaa82e9ae20929889249.1683740667.git.reinette.chatre@intel.com>
Accept-Language: en-US
Content-Language: en-US
x-ms-exchange-antispam-messagedata-chunkcount: 1
x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?rp7cvXmtMje46Y6llcAVo8PQfMd//WXtYHFVOI6AJfWuEJ9flkF0wDfCAZLt?=
 =?us-ascii?Q?BmGit52rA28DJL4Xy5fxYuv9SsHMRuexYCKUg3GhA2M2Yr3++F+I2EVe9M5f?=
 =?us-ascii?Q?Xb+SaU+iIa2Liu2EAD9GIAeq8d6CZpOTA5/PPjVVW4K3wMSvm4dcDzn+d0HP?=
 =?us-ascii?Q?DjrVHzEEGFreMayKMNiGRR08IRBcOePX5yfJrtTniSkYSa4fHrNrwX33hA5T?=
 =?us-ascii?Q?BLCFTB86Pnm49nX4oG90QhmBbZlUek2CXrZ/R2mRu36Wi3MbncKlzDtn8n7T?=
 =?us-ascii?Q?OcyOcmrQ6zTM/3SmV8vJUJoSkQEv9YElhaW29jyRkkroRiO+Ofd8JV+CcqB6?=
 =?us-ascii?Q?zpPe1oqD2cPVb50udpbyAdCImyrb/1fbL7OHZLxp47OF8pWYUDLz0slenUFl?=
 =?us-ascii?Q?AkhCN4FKUc+mOdhARKPz29hGPKR+/A1nnra4EJ+WuzdOU/fenDT3hncmzKFT?=
 =?us-ascii?Q?Hp83VsCB3Rjm1CnfcHXKm8bZ2m6HzlU9RVpIj3IYII9VzKH3TXOI9mT1oVst?=
 =?us-ascii?Q?xzhpaSvVRfLhxq6dTVIa8mryLk6cVf9ekNN0ZST6KfxBx13oryYQdR4nrkch?=
 =?us-ascii?Q?3JjsoMW9Y2b099bs0WwiywBMZp2fkB3aushKV5Hbio4k3gM2/N8+1nnj5iqg?=
 =?us-ascii?Q?OUaFgebTslQFDA4oafXXdSVUW3rFRR6Vl7pgCJIX6rBis0j2GZT59/nOpCur?=
 =?us-ascii?Q?up76LIJ1DZoara0k7XK/PW5rwExe3Xps1Ct0ezucgXVBqeO72gfGBsLIn3iw?=
 =?us-ascii?Q?kS8zjAKQZrVK3BszJ8pZFblecjOF/W5s5Io2dbyNRC7CVhaaIfZZ5GlupwVg?=
 =?us-ascii?Q?M82Rp5fap3ETGCcqJUzWe6X/kIl21j6e8OVUtRhcHM3UbzKCai55H2FfeAV4?=
 =?us-ascii?Q?92VvyqlQzc6XQR2DRn21GSNkwRQz83pnG/j1sSr0n+Dm5bh5XJnOFa/m1cSC?=
 =?us-ascii?Q?ftMjuyOBuOMxDssd4bxl1yjUiyhn0yk0SG418RrxH/fQIazKX2Fu2xFJpa3X?=
 =?us-ascii?Q?G59mvki0aq+YqWzNBDsouhvt0qMh51BE9ktmwIdINReaxYYhkuElck6weLOO?=
 =?us-ascii?Q?ZBjqRn+iWgwdzWpOR6s8z65Mlpp9Mx9/N9bIN+qO5eplDUkYK7+SJoKlgLr0?=
 =?us-ascii?Q?uu+jgQY8Au5HnhXveT0espNvOHqAaDca6dqJwMSj3MjHla26sszUuRMQb+Uv?=
 =?us-ascii?Q?ze8O1JErdGxS/G1exGKmvcsVE+IMyouoIaT/TGI+rZXoT+lBhmmBIeahzey3?=
 =?us-ascii?Q?oohe3RdijIwfmP8WQBwHHIhK7jAEdUwNy2Rs1N3+hBaarEu6dlEgQUKwCeQy?=
 =?us-ascii?Q?JZbcFsI+WfDfYRBfdR0tbJAiUp4kpzzHiCVEBOKChkr5suia9yMzVdxLOU9A?=
 =?us-ascii?Q?Kd6Ym+x/TvGNzFnJR6st+cxJt+EEFbBd9YdWPRQUEGgpDbiVhSIoyDHtl7nt?=
 =?us-ascii?Q?kUrKmTlVmJXmO4aVgXfB/utmK4VSUHa/OzL0vJXdu8hhlhP7GMxYk8doSseI?=
 =?us-ascii?Q?+IJoxnwad9KNGzBn5VV2pEFTs+Nd/pRhlMj2Sbi7bsKtKfSrI+w8wq8fVKKu?=
 =?us-ascii?Q?hP4G0BRDm7ZpqxUxmAu7YckUdWuelx7EfcWK6v2I?=
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 1722cb4b-d38c-482c-1a1c-08db567c5be1
X-MS-Exchange-CrossTenant-originalarrivaltime: 17 May 2023 02:13:52.0189
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: YiG1zzVI51L1rc6HceBHCz4zB+VUSIVEs9Gni8lBzCBFte9RgM06mCJthlXoJJ/MMhVzMEG3QjTAlywnYksKPQ==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR11MB7568
X-OriginatorOrg: intel.com
X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,
        DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,
        SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED
        autolearn=ham autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

> From: Chatre, Reinette <reinette.chatre@intel.com>
> Sent: Thursday, May 11, 2023 11:45 PM
>=20
> pci_msix_alloc_irq_at() enables an individual MSI-X interrupt to be
> allocated after MSI-X enabling.
>=20
> Use dynamic MSI-X (if supported by the device) to allocate an interrupt
> after MSI-X is enabled. An MSI-X interrupt is dynamically allocated at
> the time a valid eventfd is assigned. This is different behavior from
> a range provided during MSI-X enabling where interrupts are allocated
> for the entire range whether a valid eventfd is provided for each
> interrupt or not.
>=20
> The PCI-MSIX API requires that some number of irqs are allocated for
> an initial set of vectors when enabling MSI-X on the device. When
> dynamic MSIX allocation is not supported, the vector table, and thus
> the allocated irq set can only be resized by disabling and re-enabling
> MSI-X with a different range. In that case the irq allocation is
> essentially a cache for configuring vectors within the previously
> allocated vector range. When dynamic MSI-X allocation is supported,
> the API still requires some initial set of irqs to be allocated, but
> also supports allocating and freeing specific irq vectors both
> within and beyond the initially allocated range.
>=20
> For consistency between modes, as well as to reduce latency and improve
> reliability of allocations, and also simplicity, this implementation
> only releases irqs via pci_free_irq_vectors() when either the interrupt
> mode changes or the device is released.
>=20
> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
> Link:
> https://lore.kernel.org/lkml/20230403211841.0e206b67.alex.williamson@re
> dhat.com/

Reviewed-by: Kevin Tian <kevin.tian@intel.com>