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From:   "Mahapatra, Amit Kumar" <amit.kumar-mahapatra@amd.com>
To:     Yinbo Zhu <zhuyinbo@loongson.cn>, Mark Brown <broonie@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
CC:     Jianmin Lv <lvjianmin@loongson.cn>,
        "wanghongliang@loongson.cn" <wanghongliang@loongson.cn>,
        Liu Peibao <liupeibao@loongson.cn>,
        "loongson-kernel@lists.loongnix.cn" 
        <loongson-kernel@lists.loongnix.cn>,
        "git (AMD-Xilinx)" <git@amd.com>
Subject: RE: [PATCH v10 2/2] spi: loongson: add bus driver for the loongson
 spi controller
Thread-Topic: [PATCH v10 2/2] spi: loongson: add bus driver for the loongson
 spi controller
Thread-Index: AQHZh/gczx78IS8W1UeqJcmH5eNipK9d5lXg
Date:   Wed, 17 May 2023 04:55:28 +0000
Message-ID: <BN7PR12MB2802A6A9106C50F919693E4BDC7E9@BN7PR12MB2802.namprd12.prod.outlook.com>
References: <20230516131224.25481-1-zhuyinbo@loongson.cn>
 <20230516131224.25481-3-zhuyinbo@loongson.cn>
In-Reply-To: <20230516131224.25481-3-zhuyinbo@loongson.cn>
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Hello,

> -----Original Message-----
> From: Yinbo Zhu <zhuyinbo@loongson.cn>
> Sent: Tuesday, May 16, 2023 6:42 PM
> To: Mark Brown <broonie@kernel.org>; Rob Herring <robh+dt@kernel.org>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; linux-
> spi@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Jianmin Lv <lvjianmin@loongson.cn>; wanghongliang@loongson.cn; Liu
> Peibao <liupeibao@loongson.cn>; loongson-kernel@lists.loongnix.cn; Yinbo
> Zhu <zhuyinbo@loongson.cn>
> Subject: [PATCH v10 2/2] spi: loongson: add bus driver for the loongson s=
pi
> controller
>=20
> CAUTION: This message has originated from an External Source. Please use
> proper judgment and caution when opening attachments, clicking links, or
> responding to this email.
>=20
>=20
> This bus driver supports the Loongson SPI hardware controller in the Loon=
gson
> platforms and supports to use DTS and PCI framework to register SPI devic=
e
> resources.
>=20
> Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
> ---
>  MAINTAINERS                     |   4 +
>  drivers/spi/Kconfig             |  26 +++
>  drivers/spi/Makefile            |   3 +
>  drivers/spi/spi-loongson-core.c | 279 ++++++++++++++++++++++++++++++++
> drivers/spi/spi-loongson-pci.c  |  61 +++++++  drivers/spi/spi-loongson-p=
lat.c |
> 46 ++++++
>  drivers/spi/spi-loongson.h      |  47 ++++++
>  7 files changed, 466 insertions(+)
>  create mode 100644 drivers/spi/spi-loongson-core.c  create mode 100644
> drivers/spi/spi-loongson-pci.c  create mode 100644 drivers/spi/spi-loongs=
on-
> plat.c  create mode 100644 drivers/spi/spi-loongson.h
>=20
> diff --git a/MAINTAINERS b/MAINTAINERS
> index dfcc5db4bbc0..ab08aba965f3 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -12218,6 +12218,10 @@ M:     Yinbo Zhu <zhuyinbo@loongson.cn>
>  L:     linux-spi@vger.kernel.org
>  S:     Maintained
>  F:     Documentation/devicetree/bindings/spi/loongson,ls2k-spi.yaml
> +F:     drivers/spi/spi-loongson-core.c
> +F:     drivers/spi/spi-loongson-pci.c
> +F:     drivers/spi/spi-loongson-plat.c
> +F:     drivers/spi/spi-loongson.h
>=20
>  LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
>  M:     Sathya Prakash <sathya.prakash@broadcom.com>
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index
> 3de2ebe8294a..6b953904792e 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -516,6 +516,32 @@ config SPI_LM70_LLP
>           which interfaces to an LM70 temperature sensor using
>           a parallel port.
>=20
> +config SPI_LOONGSON_CORE
> +       tristate
> +       depends on LOONGARCH || COMPILE_TEST
> +
> +config SPI_LOONGSON_PCI
> +       tristate "Loongson SPI Controller PCI Driver Support"
> +       select SPI_LOONGSON_CORE
> +       depends on PCI && (LOONGARCH || COMPILE_TEST)
> +       help
> +         This bus driver supports the Loongson SPI hardware controller i=
n
> +         the Loongson platforms and supports to use PCI framework to
> +         register SPI device resources.
> +         Say Y or M here if you want to use the SPI controller on
> +         Loongson platform.
> +
> +config SPI_LOONGSON_PLATFORM
> +       tristate "Loongson SPI Controller Platform Driver Support"
> +       select SPI_LOONGSON_CORE
> +       depends on OF && (LOONGARCH || COMPILE_TEST)
> +       help
> +         This bus driver supports the Loongson SPI hardware controller i=
n
> +         the Loongson platforms and supports to use DTS framework to
> +         register SPI device resources.
> +         Say Y or M here if you want to use the SPI controller on
> +         Loongson platform.
> +
>  config SPI_LP8841_RTC
>         tristate "ICP DAS LP-8841 SPI Controller for RTC"
>         depends on MACH_PXA27X_DT || COMPILE_TEST diff --git
> a/drivers/spi/Makefile b/drivers/spi/Makefile index
> 28c4817a8a74..3e933064d237 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -71,6 +71,9 @@ obj-$(CONFIG_SPI_INTEL_PLATFORM)      +=3D spi-intel-
> platform.o
>  obj-$(CONFIG_SPI_LANTIQ_SSC)           +=3D spi-lantiq-ssc.o
>  obj-$(CONFIG_SPI_JCORE)                        +=3D spi-jcore.o
>  obj-$(CONFIG_SPI_LM70_LLP)             +=3D spi-lm70llp.o
> +obj-$(CONFIG_SPI_LOONGSON_CORE)                +=3D spi-loongson-core.o
> +obj-$(CONFIG_SPI_LOONGSON_PCI)         +=3D spi-loongson-pci.o
> +obj-$(CONFIG_SPI_LOONGSON_PLATFORM)    +=3D spi-loongson-plat.o
>  obj-$(CONFIG_SPI_LP8841_RTC)           +=3D spi-lp8841-rtc.o
>  obj-$(CONFIG_SPI_MESON_SPICC)          +=3D spi-meson-spicc.o
>  obj-$(CONFIG_SPI_MESON_SPIFC)          +=3D spi-meson-spifc.o
> diff --git a/drivers/spi/spi-loongson-core.c b/drivers/spi/spi-loongson-c=
ore.c
> new file mode 100644 index 000000000000..435a58b0d9da
> --- /dev/null
> +++ b/drivers/spi/spi-loongson-core.c
> @@ -0,0 +1,279 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Loongson SPI Support
> +// Copyright (C) 2023 Loongson Technology Corporation Limited
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +
> +#include "spi-loongson.h"
> +
> +static inline void loongson_spi_write_reg(struct loongson_spi *spi, unsi=
gned
> char reg,
> +                                         unsigned char data) {
> +       writeb(data, spi->base + reg);
> +}
> +
> +static inline char loongson_spi_read_reg(struct loongson_spi *spi,
> +unsigned char reg) {
> +       return readb(spi->base + reg);
> +}
> +
> +static void loongson_spi_set_cs(struct spi_device *spi, bool val) {
> +       int cs;
> +       struct loongson_spi *loongson_spi =3D
> +spi_master_get_devdata(spi->master);
> +
> +       cs =3D loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG)
> +                                          & ~(0x11 << spi->chip_select);

New set/get APIs for accessing spi->chip_select were introduced by
https://github.com/torvalds/linux/commit/303feb3cc06ac0665d0ee9c1414941200e=
60e8a3
please use these APIs instead of accessing spi->chip_select directly.

> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG,
> +                                      (val ? (0x11 << spi->chip_select) =
:

Same here
> +                                      (0x1 << spi->chip_select)) | cs);

Same here
> +}
> +
> +static void loongson_spi_set_clk(struct loongson_spi *loongson_spi,
> +unsigned int hz) {
> +       unsigned char val;
> +       unsigned int div, div_tmp;
> +       const char rdiv[12] =3D {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11};
> +
> +       div =3D clamp_val(DIV_ROUND_UP_ULL(loongson_spi->clk_rate, hz), 2=
,
> 4096);
> +       div_tmp =3D rdiv[fls(div - 1)];
> +       loongson_spi->spcr =3D (div_tmp & GENMASK(1, 0)) >> 0;
> +       loongson_spi->sper =3D (div_tmp & GENMASK(3, 2)) >> 2;
> +       val =3D loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG=
);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, (val =
&
> ~3) |
> +                              loongson_spi->spcr);
> +       val =3D loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG=
);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG, (val =
&
> ~3) |
> +                              loongson_spi->sper);
> +       loongson_spi->hz =3D hz;
> +}
> +
> +static void loongson_spi_set_mode(struct loongson_spi *loongson_spi,
> +                                 struct spi_device *spi) {
> +       unsigned char val;
> +
> +       val =3D loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG=
);
> +       val &=3D ~(LOONGSON_SPI_SPCR_CPOL | LOONGSON_SPI_SPCR_CPHA);
> +       if (spi->mode & SPI_CPOL)
> +               val |=3D LOONGSON_SPI_SPCR_CPOL;
> +       if (spi->mode & SPI_CPHA)
> +               val |=3D LOONGSON_SPI_SPCR_CPHA;
> +
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, val);
> +       loongson_spi->mode |=3D spi->mode; }
> +
> +static int loongson_spi_update_state(struct loongson_spi *loongson_spi,
> +                               struct spi_device *spi, struct
> +spi_transfer *t) {
> +       unsigned int hz;
> +
> +       if (t)
> +               hz =3D t->speed_hz;
> +
> +       if (hz && loongson_spi->hz !=3D hz)
> +               loongson_spi_set_clk(loongson_spi, hz);
> +
> +       if ((spi->mode ^ loongson_spi->mode) & SPI_MODE_X_MASK)
> +               loongson_spi_set_mode(loongson_spi, spi);
> +
> +       return 0;
> +}
> +
> +static int loongson_spi_setup(struct spi_device *spi) {
> +       struct loongson_spi *loongson_spi;
> +
> +       loongson_spi =3D spi_master_get_devdata(spi->master);
> +       if (spi->bits_per_word % 8)
> +               return -EINVAL;
> +
> +       if (spi->chip_select >=3D spi->master->num_chipselect)

Same here

Regards,
Amit

> +               return -EINVAL;
> +
> +       loongson_spi->hz =3D 0;
> +       loongson_spi_set_cs(spi, 1);
> +
> +       return 0;
> +}
> +
> +static int loongson_spi_write_read_8bit(struct spi_device *spi, const u8
> **tx_buf,
> +                                       u8 **rx_buf, unsigned int num) {
> +       struct loongson_spi *loongson_spi =3D
> +spi_master_get_devdata(spi->master);
> +
> +       if (tx_buf && *tx_buf)
> +               loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_RE=
G,
> *((*tx_buf)++));
> +       else
> +               loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_RE=
G,
> 0);
> +       readb_poll_timeout(loongson_spi->base + LOONGSON_SPI_SPSR_REG,
> loongson_spi->spsr,
> +                          (loongson_spi->spsr & 0x1) !=3D 1, 1,
> + MSEC_PER_SEC);
> +
> +       if (rx_buf && *rx_buf)
> +               *(*rx_buf)++ =3D loongson_spi_read_reg(loongson_spi,
> LOONGSON_SPI_FIFO_REG);
> +       else
> +               loongson_spi_read_reg(loongson_spi,
> + LOONGSON_SPI_FIFO_REG);
> +
> +       return 0;
> +}
> +
> +static unsigned int loongson_spi_write_read(struct spi_device *spi,
> +struct spi_transfer *xfer) {
> +       unsigned int count;
> +       const u8 *tx =3D xfer->tx_buf;
> +       u8 *rx =3D xfer->rx_buf;
> +
> +       count =3D xfer->len;
> +
> +       do {
> +               if (loongson_spi_write_read_8bit(spi, &tx, &rx, count) < =
0)
> +                       goto out;
> +               count--;
> +       } while (count);
> +
> +out:
> +       return xfer->len - count;
> +}
> +
> +static int loongson_spi_prepare_message(struct spi_controller *ctlr,
> +struct spi_message *m) {
> +       struct loongson_spi *loongson_spi =3D
> +spi_controller_get_devdata(ctlr);
> +
> +       loongson_spi->para =3D loongson_spi_read_reg(loongson_spi,
> LOONGSON_SPI_PARA_REG);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG,
> + loongson_spi->para & ~1);
> +
> +       return 0;
> +}
> +
> +static int loongson_spi_transfer_one(struct spi_controller *ctrl, struct
> spi_device *spi,
> +                                    struct spi_transfer *xfer) {
> +       struct loongson_spi *loongson_spi =3D
> +spi_master_get_devdata(spi->master);
> +
> +       loongson_spi_update_state(loongson_spi, spi, xfer);
> +       if (xfer->len)
> +               xfer->len =3D loongson_spi_write_read(spi, xfer);
> +
> +       return 0;
> +}
> +
> +static int loongson_spi_unprepare_message(struct spi_controller *ctrl,
> +struct spi_message *m) {
> +       struct loongson_spi *loongson_spi =3D
> +spi_controller_get_devdata(ctrl);
> +
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG,
> + loongson_spi->para);
> +
> +       return 0;
> +}
> +
> +static void loongson_spi_reginit(struct loongson_spi *loongson_spi_dev)
> +{
> +       unsigned char val;
> +
> +       val =3D loongson_spi_read_reg(loongson_spi_dev,
> LOONGSON_SPI_SPCR_REG);
> +       val &=3D ~LOONGSON_SPI_SPCR_SPE;
> +       loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG,
> + val);
> +
> +       loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPSR_REG,
> +                              (LOONGSON_SPI_SPSR_SPIF |
> + LOONGSON_SPI_SPSR_WCOL));
> +
> +       val =3D loongson_spi_read_reg(loongson_spi_dev,
> LOONGSON_SPI_SPCR_REG);
> +       val |=3D LOONGSON_SPI_SPCR_SPE;
> +       loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG,
> +val); }
> +
> +int loongson_spi_init_master(struct device *dev, void __iomem *regs) {
> +       struct spi_master *master;
> +       struct loongson_spi *spi;
> +       struct clk *clk;
> +
> +       master =3D devm_spi_alloc_master(dev, sizeof(struct loongson_spi)=
);
> +       if (master =3D=3D NULL)
> +               return -ENOMEM;
> +
> +       master->mode_bits =3D SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
> +       master->setup =3D loongson_spi_setup;
> +       master->prepare_message =3D loongson_spi_prepare_message;
> +       master->transfer_one =3D loongson_spi_transfer_one;
> +       master->unprepare_message =3D loongson_spi_unprepare_message;
> +       master->set_cs =3D loongson_spi_set_cs;
> +       master->num_chipselect =3D 4;
> +       device_set_node(&master->dev, dev_fwnode(dev));
> +       dev_set_drvdata(dev, master);
> +
> +       spi =3D spi_master_get_devdata(master);
> +       spi->base =3D regs;
> +       spi->master =3D master;
> +
> +       clk =3D devm_clk_get_optional(dev, NULL);
> +       if (!IS_ERR(clk))
> +               spi->clk_rate =3D clk_get_rate(clk);
> +       else
> +               return dev_err_probe(dev, PTR_ERR(clk), "unable to get
> + clock\n");
> +
> +       loongson_spi_reginit(spi);
> +
> +       spi->mode =3D 0;
> +
> +       return devm_spi_register_master(dev, master); }
> +EXPORT_SYMBOL_NS_GPL(loongson_spi_init_master,
> SPI_LOONGSON_CORE);
> +
> +static int __maybe_unused loongson_spi_suspend(struct device *dev) {
> +       struct loongson_spi *loongson_spi;
> +       struct spi_master *master;
> +
> +       master =3D dev_get_drvdata(dev);
> +       spi_master_suspend(master);
> +
> +       loongson_spi =3D spi_master_get_devdata(master);
> +
> +       loongson_spi->spcr =3D loongson_spi_read_reg(loongson_spi,
> LOONGSON_SPI_SPCR_REG);
> +       loongson_spi->sper =3D loongson_spi_read_reg(loongson_spi,
> LOONGSON_SPI_SPER_REG);
> +       loongson_spi->spsr =3D loongson_spi_read_reg(loongson_spi,
> LOONGSON_SPI_SPSR_REG);
> +       loongson_spi->para =3D loongson_spi_read_reg(loongson_spi,
> LOONGSON_SPI_PARA_REG);
> +       loongson_spi->sfcs =3D loongson_spi_read_reg(loongson_spi,
> LOONGSON_SPI_SFCS_REG);
> +       loongson_spi->timi =3D loongson_spi_read_reg(loongson_spi,
> + LOONGSON_SPI_TIMI_REG);
> +
> +       return 0;
> +}
> +
> +static int __maybe_unused loongson_spi_resume(struct device *dev) {
> +       struct loongson_spi *loongson_spi;
> +       struct spi_master *master;
> +
> +       master =3D dev_get_drvdata(dev);
> +       loongson_spi =3D spi_master_get_devdata(master);
> +
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG,
> loongson_spi->spcr);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG,
> loongson_spi->sper);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPSR_REG,
> loongson_spi->spsr);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG,
> loongson_spi->para);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG,
> loongson_spi->sfcs);
> +       loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_TIMI_REG,
> + loongson_spi->timi);
> +
> +       spi_master_resume(master);
> +
> +       return 0;
> +}
> +
> +const struct dev_pm_ops loongson_spi_dev_pm_ops =3D {
> +       .suspend =3D loongson_spi_suspend,
> +       .resume =3D loongson_spi_resume,
> +};
> +EXPORT_SYMBOL_NS_GPL(loongson_spi_dev_pm_ops,
> SPI_LOONGSON_CORE);
> +
> +MODULE_DESCRIPTION("Loongson SPI core driver");
> MODULE_LICENSE("GPL");
> diff --git a/drivers/spi/spi-loongson-pci.c b/drivers/spi/spi-loongson-pc=
i.c new
> file mode 100644 index 000000000000..c351a689150a
> --- /dev/null
> +++ b/drivers/spi/spi-loongson-pci.c
> @@ -0,0 +1,61 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// PCI interface driver for Loongson SPI Support // Copyright (C) 2023
> +Loongson Technology Corporation Limited
> +
> +#include <linux/pci.h>
> +
> +#include "spi-loongson.h"
> +
> +static int loongson_spi_pci_register(struct pci_dev *pdev,
> +                       const struct pci_device_id *ent) {
> +       int ret;
> +       void __iomem *reg_base;
> +       struct device *dev =3D &pdev->dev;
> +       int pci_bar =3D 0;
> +
> +       ret =3D pcim_enable_device(pdev);
> +       if (ret < 0)
> +               return dev_err_probe(dev, ret, "cannot enable pci
> + device\n");
> +
> +       ret =3D pcim_iomap_regions(pdev, BIT(pci_bar), pci_name(pdev));
> +       if (ret)
> +               return dev_err_probe(dev, ret, "failed to request and
> + remap memory\n");
> +
> +       reg_base =3D pcim_iomap_table(pdev)[pci_bar];
> +
> +       ret =3D loongson_spi_init_master(dev, reg_base);
> +       if (ret)
> +               return dev_err_probe(dev, ret, "failed to initialize
> + master\n");
> +
> +       return 0;
> +}
> +
> +static void loongson_spi_pci_unregister(struct pci_dev *pdev) {
> +       pcim_iounmap_regions(pdev, BIT(0));
> +       pci_disable_device(pdev);
> +}
> +
> +static struct pci_device_id loongson_spi_devices[] =3D {
> +       { PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, 0x7a0b) },
> +       { PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, 0x7a1b) },
> +       { },
> +};
> +MODULE_DEVICE_TABLE(pci, loongson_spi_devices);
> +
> +static struct pci_driver loongson_spi_pci_driver =3D {
> +       .name       =3D "loongson-spi-pci",
> +       .id_table   =3D loongson_spi_devices,
> +       .probe      =3D loongson_spi_pci_register,
> +       .remove     =3D loongson_spi_pci_unregister,
> +       .driver =3D {
> +               .bus =3D &pci_bus_type,
> +               .pm =3D &loongson_spi_dev_pm_ops,
> +       },
> +};
> +module_pci_driver(loongson_spi_pci_driver);
> +
> +MODULE_DESCRIPTION("Loongson spi pci driver"); MODULE_LICENSE("GPL");
> +MODULE_IMPORT_NS(SPI_LOONGSON_CORE);
> diff --git a/drivers/spi/spi-loongson-plat.c b/drivers/spi/spi-loongson-p=
lat.c
> new file mode 100644 index 000000000000..2e0388d84044
> --- /dev/null
> +++ b/drivers/spi/spi-loongson-plat.c
> @@ -0,0 +1,46 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Platform driver for Loongson SPI Support // Copyright (C) 2023
> +Loongson Technology Corporation Limited
> +
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +
> +#include "spi-loongson.h"
> +
> +static int loongson_spi_platform_probe(struct platform_device *pdev) {
> +       int ret;
> +       void __iomem *reg_base;
> +       struct device *dev =3D &pdev->dev;
> +
> +       reg_base =3D devm_platform_ioremap_resource(pdev, 0);
> +       if (IS_ERR(reg_base))
> +               return PTR_ERR(reg_base);
> +
> +       ret =3D loongson_spi_init_master(dev, reg_base);
> +       if (ret)
> +               return dev_err_probe(dev, ret, "failed to initialize
> + master\n");
> +
> +       return ret;
> +}
> +
> +static const struct of_device_id loongson_spi_id_table[] =3D {
> +       { .compatible =3D "loongson,ls2k-spi" },
> +       { }
> +};
> +MODULE_DEVICE_TABLE(of, loongson_spi_id_table);
> +
> +static struct platform_driver loongson_spi_plat_driver =3D {
> +       .probe =3D loongson_spi_platform_probe,
> +       .driver =3D {
> +               .name   =3D "loongson-spi",
> +               .bus =3D &platform_bus_type,
> +               .pm =3D &loongson_spi_dev_pm_ops,
> +               .of_match_table =3D loongson_spi_id_table,
> +       },
> +};
> +module_platform_driver(loongson_spi_plat_driver);
> +
> +MODULE_DESCRIPTION("Loongson spi platform driver");
> +MODULE_LICENSE("GPL"); MODULE_IMPORT_NS(SPI_LOONGSON_CORE);
> diff --git a/drivers/spi/spi-loongson.h b/drivers/spi/spi-loongson.h new =
file
> mode 100644 index 000000000000..5dca9750efa3
> --- /dev/null
> +++ b/drivers/spi/spi-loongson.h
> @@ -0,0 +1,47 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/* Header File for Loongson SPI Driver. */
> +/* Copyright (C) 2023 Loongson Technology Corporation Limited */
> +
> +#ifndef __LINUX_SPI_LOONGSON_H
> +#define __LINUX_SPI_LOONGSON_H
> +
> +#include <linux/bits.h>
> +#include <linux/device.h>
> +#include <linux/pm.h>
> +#include <linux/spi/spi.h>
> +#include <linux/types.h>
> +
> +#define        LOONGSON_SPI_SPCR_REG   0x00
> +#define        LOONGSON_SPI_SPSR_REG   0x01
> +#define        LOONGSON_SPI_FIFO_REG   0x02
> +#define        LOONGSON_SPI_SPER_REG   0x03
> +#define        LOONGSON_SPI_PARA_REG   0x04
> +#define        LOONGSON_SPI_SFCS_REG   0x05
> +#define        LOONGSON_SPI_TIMI_REG   0x06
> +
> +/* Bits definition for Loongson SPI register */
> +#define        LOONGSON_SPI_PARA_MEM_EN        BIT(0)
> +#define        LOONGSON_SPI_SPCR_CPHA  BIT(2)
> +#define        LOONGSON_SPI_SPCR_CPOL  BIT(3)
> +#define        LOONGSON_SPI_SPCR_SPE   BIT(6)
> +#define        LOONGSON_SPI_SPSR_WCOL  BIT(6)
> +#define        LOONGSON_SPI_SPSR_SPIF  BIT(7)
> +
> +struct loongson_spi {
> +       struct  spi_master      *master;
> +       void __iomem            *base;
> +       int                     cs_active;
> +       unsigned int            hz;
> +       unsigned char           spcr;
> +       unsigned char           sper;
> +       unsigned char           spsr;
> +       unsigned char           para;
> +       unsigned char           sfcs;
> +       unsigned char           timi;
> +       unsigned int            mode;
> +       u64                     clk_rate;
> +};
> +
> +int loongson_spi_init_master(struct device *dev, void __iomem *reg);
> +extern const struct dev_pm_ops loongson_spi_dev_pm_ops; #endif /*
> +__LINUX_SPI_LOONGSON_H */
> --
> 2.20.1