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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bv19-20020a17090af19300b00247b1a05438si977549pjb.16.2023.05.16.22.40.38; Tue, 16 May 2023 22:40:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h9lCWonh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232358AbjEQF3s (ORCPT + 99 others); Wed, 17 May 2023 01:29:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232353AbjEQF3q (ORCPT ); Wed, 17 May 2023 01:29:46 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63D5D40C2 for ; Tue, 16 May 2023 22:29:45 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-3f41dceb9d4so3190885e9.1 for ; Tue, 16 May 2023 22:29:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684301384; x=1686893384; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=3F8/AW2YhS524kwApvlgE1HyyL1L1DLl+/WPH6DtX7A=; b=h9lCWonhhhnN+AX6OpIB6aZNqqvYduly1ePB/NfOSldi5Y6cEBxJTENZ/PpIkikAFb MPrKQpUSt4ll2TQ5bowzaFRCR/ljzToP1mdaXjf0t7p1aR2T0qcdUZuyat7zVjOxfxo8 kxxHZ9d0N8opIM/YTMSyVPUNRS8qO9j2eyRy4TNMlUNSQAZEmr777IIrPbz9mILJ8rRg ULopXMrMNhtpjQ1liGjG/jvacQzLddsJ2Cc0Q/Mo8CEVp9ws1p5AKQmsyoT2yaMHuM6m yQ1ozpbAbtFiGWSc6EaK0QTWo3uutLwrP29h9c4Ahl4TiFRfCWaO/YgPWgRLqvsM3e7F 6Y2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684301384; x=1686893384; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=3F8/AW2YhS524kwApvlgE1HyyL1L1DLl+/WPH6DtX7A=; b=lxCMWB4TFXE6lA2mYD8la+0XCzI8jfdLLhNpGPq93PQeQp76dSALfjtqtRkONHpMAw NgKPvj/O0zBzDsMj6j24wsaiAkMX6U0rXqIuB4uofTViUQzi7gOw/sT4LH0VdIYH9iCl H0AMETXRWoBx6Q6HaiKEYwrf9warvM6hcuiyxv3X2ZHWCCfVoHFdkvi4mijuBmnbxn40 6Rtm6Psq6VdTkDpVIRB2a0IxJElxgN3aEBwZ3fEDlb8VuZ98/bazRGHZHk9Ha/M0PoOB JY3fkjkFT3dAuYBp5fdOqTMQhhgNGWqC83k4P7NA7ISSNEVLu91aJZ8/3DGFEdOx8oOp PH3A== X-Gm-Message-State: AC+VfDxbgSc9Rv/EZOhDPD9e2hwu1aea5bAE/F9t9d3mBfZV5lnIRYKe +hQWhXLzT8FrZl0RQsGBWaDG X-Received: by 2002:a05:600c:228e:b0:3f4:2174:b28a with SMTP id 14-20020a05600c228e00b003f42174b28amr30103996wmf.15.1684301383767; Tue, 16 May 2023 22:29:43 -0700 (PDT) Received: from thinkpad ([59.92.102.59]) by smtp.gmail.com with ESMTPSA id z23-20020a7bc7d7000000b003f1957ace1fsm939977wmk.13.2023.05.16.22.29.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 22:29:43 -0700 (PDT) Date: Wed, 17 May 2023 10:59:31 +0530 From: Manivannan Sadhasivam To: Serge Semin Cc: Bjorn Helgaas , Lorenzo Pieralisi , Cai Huoqing , Jingoo Han , Gustavo Pimentel , Vinod Koul , Yoshihiro Shimoda , Rob Herring , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Nobuhiro Iwamatsu , Serge Semin , Alexey Malahov , Pavel Parkhomenko , linux-pci@vger.kernel.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RESEND v5 07/14] PCI: visconti: Convert to using generic resources getter Message-ID: <20230517052931.GB4868@thinkpad> References: <20230511190902.28896-1-Sergey.Semin@baikalelectronics.ru> <20230511190902.28896-8-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230511190902.28896-8-Sergey.Semin@baikalelectronics.ru> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 11, 2023 at 10:08:55PM +0300, Serge Semin wrote: > The generic resources request infrastructure has been recently added to > the DW PCIe core driver. Since the DT-bindings of the Toshibo Visconti > PCIe Host controller is fully compatible with the generic names set let's > convert the driver to using that infrastructure. It won't take much effort > since the low-level device driver implies the resources request only with > no additional manipulations involving them. So just drop the locally > defined clocks request procedures, activate the generic resources request > capability and make sure the mandatory resources have been requested by > the DW PCIe core driver. > > Suggested-by: Bjorn Helgaas > Signed-off-by: Serge Semin Acked-by: Manivannan Sadhasivam - Mani > --- > drivers/pci/controller/dwc/pcie-visconti.c | 37 ++++++++++------------ > 1 file changed, 17 insertions(+), 20 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-visconti.c b/drivers/pci/controller/dwc/pcie-visconti.c > index 71026fefa366..ae1517b52c58 100644 > --- a/drivers/pci/controller/dwc/pcie-visconti.c > +++ b/drivers/pci/controller/dwc/pcie-visconti.c > @@ -29,9 +29,6 @@ struct visconti_pcie { > void __iomem *ulreg_base; > void __iomem *smu_base; > void __iomem *mpu_base; > - struct clk *refclk; > - struct clk *coreclk; > - struct clk *auxclk; > }; > > #define PCIE_UL_REG_S_PCIE_MODE 0x00F4 > @@ -198,6 +195,21 @@ static int visconti_pcie_host_init(struct dw_pcie_rp *pp) > int err; > u32 val; > > + if (!pcie->pci.core_clks[DW_PCIE_REF_CLK].clk) { > + dev_err(pci->dev, "Missing ref clock source\n"); > + return -ENOENT; > + } > + > + if (!pcie->pci.core_clks[DW_PCIE_CORE_CLK].clk) { > + dev_err(pci->dev, "Missing core clock source\n"); > + return -ENOENT; > + } > + > + if (!pcie->pci.core_clks[DW_PCIE_AUX_CLK].clk) { > + dev_err(pci->dev, "Missing aux clock source\n"); > + return -ENOENT; > + } > + > visconti_smu_writel(pcie, > PISMU_CKON_PCIE_AUX_CLK | PISMU_CKON_PCIE_MSTR_ACLK, > PISMU_CKON_PCIE); > @@ -242,8 +254,6 @@ static const struct dw_pcie_host_ops visconti_pcie_host_ops = { > static int visconti_get_resources(struct platform_device *pdev, > struct visconti_pcie *pcie) > { > - struct device *dev = &pdev->dev; > - > pcie->ulreg_base = devm_platform_ioremap_resource_byname(pdev, "ulreg"); > if (IS_ERR(pcie->ulreg_base)) > return PTR_ERR(pcie->ulreg_base); > @@ -256,21 +266,6 @@ static int visconti_get_resources(struct platform_device *pdev, > if (IS_ERR(pcie->mpu_base)) > return PTR_ERR(pcie->mpu_base); > > - pcie->refclk = devm_clk_get(dev, "ref"); > - if (IS_ERR(pcie->refclk)) > - return dev_err_probe(dev, PTR_ERR(pcie->refclk), > - "Failed to get ref clock\n"); > - > - pcie->coreclk = devm_clk_get(dev, "core"); > - if (IS_ERR(pcie->coreclk)) > - return dev_err_probe(dev, PTR_ERR(pcie->coreclk), > - "Failed to get core clock\n"); > - > - pcie->auxclk = devm_clk_get(dev, "aux"); > - if (IS_ERR(pcie->auxclk)) > - return dev_err_probe(dev, PTR_ERR(pcie->auxclk), > - "Failed to get aux clock\n"); > - > return 0; > } > > @@ -304,6 +299,8 @@ static int visconti_pcie_probe(struct platform_device *pdev) > pci->dev = dev; > pci->ops = &dw_pcie_ops; > > + dw_pcie_cap_set(pci, REQ_RES); > + > ret = visconti_get_resources(pdev, pcie); > if (ret) > return ret; > -- > 2.40.0 > > -- மணிவண்ணன் சதாசிவம்