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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i6-20020a170902c28600b001ac7aa1c7b9si19316272pld.388.2023.05.17.02.52.21; Wed, 17 May 2023 02:52:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=QDhiaX4s; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229935AbjEQJmj (ORCPT + 99 others); Wed, 17 May 2023 05:42:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229520AbjEQJmf (ORCPT ); Wed, 17 May 2023 05:42:35 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECB005256; Wed, 17 May 2023 02:42:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1684316551; x=1715852551; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+uWE9bBrEsxXvxosuC1tPMiUqN2hS3oJSFdol+Ua8Fk=; b=QDhiaX4sleOWQe+9ljP7X33xTP/NIJBQl08I4lC/xtX6MDahvxio9wCR cOnuIQ+WQIU+1wgajRcKMG9edyGcPueHqiz+SgZFZvanhxB5/QXplmkCh +Jeo5yWjwukrSKRUlAOD39q9h6Q7JVsUvwKZ3N73phTNuaZJSWYCOPiGT s5KZcq7onzceAJ0pijt7epUpAib69qDhKLTOucAU7KGqms+G5U184si2L rkrYp0aMd82ewY/jITOfsVvKRNpc+MQaI3zukqx04KdjsDPDvDpzFz6H4 bm081kwReTiqGZm1vFFWLigb/loJwMJYDTR8i1+zdHyQz7/zXJTIgH5AN A==; X-IronPort-AV: E=Sophos;i="5.99,281,1677567600"; d="scan'208";a="152505859" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 May 2023 02:42:29 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 17 May 2023 02:42:29 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Wed, 17 May 2023 02:42:24 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v5 3/5] ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings Date: Wed, 17 May 2023 12:41:17 +0300 Message-ID: <20230517094119.2894220-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230517094119.2894220-1-claudiu.beznea@microchip.com> References: <20230517094119.2894220-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Switch slow clock controller to new clock bindings. Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/at91sam9n12.dtsi | 23 +++-------------------- 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index c2e7460fb7ff..0e28101b26bf 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -146,28 +146,11 @@ shdwc@fffffe10 { clocks = <&clk32k>; }; - sckc@fffffe50 { + clk32k: clock-controller@fffffe50 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xfffffe50 0x4>; - - slow_osc: slow_osc { - compatible = "atmel,at91sam9x5-clk-slow-osc"; - #clock-cells = <0>; - clocks = <&slow_xtal>; - }; - - slow_rc_osc: slow_rc_osc { - compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-accuracy = <50000000>; - }; - - clk32k: slck { - compatible = "atmel,at91sam9x5-clk-slow"; - #clock-cells = <0>; - clocks = <&slow_rc_osc>, <&slow_osc>; - }; + clocks = <&slow_xtal>; + #clock-cells = <0>; }; mmc0: mmc@f0008000 { -- 2.34.1