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Date:   Wed, 17 May 2023 11:57:14 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= 
        <u.kleine-koenig@pengutronix.de>
CC:     Thierry Reding <thierry.reding@gmail.com>,
        Daire McNamara <daire.mcnamara@microchip.com>,
        <linux-kernel@vger.kernel.org>, <linux-pwm@vger.kernel.org>,
        <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v17 1/2] pwm: add microchip soft ip corePWM driver
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On Wed, May 17, 2023 at 12:20:30PM +0200, Uwe Kleine-K=F6nig wrote:
> Hello Conor,
>=20
> I found one remaining issue:
>=20
> On Fri, Apr 21, 2023 at 10:27:09AM +0100, Conor Dooley wrote:
> > +static u64 mchp_core_pwm_calc_duty(const struct pwm_state *state, u64 =
clk_rate,
> > +				   u8 prescale, u8 period_steps)
> > +{
> > +	u64 duty_steps, tmp;
> > +
> > +	/*
> > +	 * Calculate the duty cycle in multiples of the prescaled period:
> > +	 * duty_steps =3D duty_in_ns / step_in_ns
> > +	 * step_in_ns =3D (prescale * NSEC_PER_SEC) / clk_rate
> > +	 * The code below is rearranged slightly to only divide once.
> > +	 */
> > +	tmp =3D (prescale + 1) * NSEC_PER_SEC;
>=20
> If prescale > 4 this overflows on 32bit archs, doesn't it?

Ooh, I think you are right.

> (I think prescale + 1 is promoted to unsigned int, then the
> multiplication is done and only then the range is extended to u64.

I'll respin with an explicit cast.

Thanks,
Conor.

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