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 <1c8997c7c72143d130ebbc9ba438cebddc9d35e0.camel@pengutronix.de>
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From:   Adam Ford <aford173@gmail.com>
Date:   Wed, 17 May 2023 08:09:59 -0500
Message-ID: <CAHCN7x+7QMiD6jeoHqTEcN+Rm22gddiqVDUO8ThVi4TnKER4iA@mail.gmail.com>
Subject: Re: [PATCH V6 3/6] drm: bridge: samsung-dsim: Fetch
 pll-clock-frequency automatically
To:     Lucas Stach <l.stach@pengutronix.de>
Cc:     dri-devel@lists.freedesktop.org, Marek Vasut <marex@denx.de>,
        Neil Armstrong <neil.armstrong@linaro.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Robert Foss <rfoss@kernel.org>,
        Jonas Karlman <jonas@kwiboo.se>, aford@beaconembedded.com,
        Frieder Schrempf <frieder.schrempf@kontron.de>,
        linux-kernel@vger.kernel.org,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Andrzej Hajda <andrzej.hajda@intel.com>,
        Chen-Yu Tsai <wenst@chromium.org>,
        Marek Szyprowski <m.szyprowski@samsung.com>,
        Jagan Teki <jagan@amarulasolutions.com>
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On Wed, May 17, 2023 at 7:56=E2=80=AFAM Lucas Stach <l.stach@pengutronix.de=
> wrote:
>
> Hi Adam,
>
> Am Montag, dem 15.05.2023 um 18:57 -0500 schrieb Adam Ford:
> > Make the pll-clock-frequency optional.  If it's present, use it
> > to maintain backwards compatibility with existing hardware.  If it
> > is absent, read clock rate of "sclk_mipi" to determine the rate.
> > Since it can be optional, change the message from an error to
> > dev_info.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> > Tested-by: Chen-Yu Tsai <wenst@chromium.org>
> > Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
> > Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
> > ---
> >  drivers/gpu/drm/bridge/samsung-dsim.c | 23 ++++++++++++++++-------
> >  1 file changed, 16 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/br=
idge/samsung-dsim.c
> > index bf4b33d2de76..08266303c261 100644
> > --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> > @@ -1712,11 +1712,11 @@ static const struct mipi_dsi_host_ops samsung_d=
sim_ops =3D {
> >  };
> >
> >  static int samsung_dsim_of_read_u32(const struct device_node *np,
> > -                                 const char *propname, u32 *out_value)
> > +                                 const char *propname, u32 *out_value,=
 bool optional)
> >  {
> >       int ret =3D of_property_read_u32(np, propname, out_value);
> >
> > -     if (ret < 0)
> > +     if (ret < 0 && !optional)
> >               pr_err("%pOF: failed to get '%s' property\n", np, propnam=
e);
> >
> >       return ret;
> > @@ -1726,20 +1726,29 @@ static int samsung_dsim_parse_dt(struct samsung=
_dsim *dsi)
> >  {
> >       struct device *dev =3D dsi->dev;
> >       struct device_node *node =3D dev->of_node;
> > +     struct clk *pll_clk;
> >       int ret;
> >
> >       ret =3D samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequen=
cy",
> > -                                    &dsi->pll_clk_rate);
> > -     if (ret < 0)
> > -             return ret;
> > +                                    &dsi->pll_clk_rate, 1);
> > +
> > +     /* If it doesn't exist, read it from the clock instead of failing=
 */
> > +     if (ret < 0) {
> > +             dev_info(dev, "Using sclk_mipi for pll clock frequency\n"=
);
>
> While this is certainly helpful while debugging the driver, I don't
> think it warrants a info print. Remove or downgrade to dev_dbg?

I can move to dbg.

>
> On the other hand the changed driver behavior should be documented in
> the devicetree binding by moving "samsung,pll-clock-frequency" into the
> optional properties and spelling out which clock rate is used when the
> property is absent.

Once this series is accepted, I was planning on doing a binding patch
which describes the items that are now optional followed by a patch to
add DSI->HDMI for the Beacon boards.  I can see the value in putting
the bindings patch in this series instead. I'll add it to the next
revision to cover both items that are now optional.

adam

>
> Regards,
> Lucas
>
> > +             pll_clk =3D devm_clk_get(dev, "sclk_mipi");
> > +             if (!IS_ERR(pll_clk))
> > +                     dsi->pll_clk_rate =3D clk_get_rate(pll_clk);
> > +             else
> > +                     return PTR_ERR(pll_clk);
> > +     }
> >
> >       ret =3D samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequ=
ency",
> > -                                    &dsi->burst_clk_rate);
> > +                                    &dsi->burst_clk_rate, 0);
> >       if (ret < 0)
> >               return ret;
> >
> >       ret =3D samsung_dsim_of_read_u32(node, "samsung,esc-clock-frequen=
cy",
> > -                                    &dsi->esc_clk_rate);
> > +                                    &dsi->esc_clk_rate, 0);
> >       if (ret < 0)
> >               return ret;
> >
>