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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com, paul.arola@telus.com, scott.roberts@telus.com Subject: Re: [PATCH net-next 2/2] net: dsa: mv88e6xxx: enable support for 88E6361 switch Message-ID: <9a836863-c279-490f-a49a-de4db5de9fd4@lunn.ch> References: <20230517203430.448705-1-alexis.lothore@bootlin.com> <20230517203430.448705-3-alexis.lothore@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230517203430.448705-3-alexis.lothore@bootlin.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 17, 2023 at 10:34:30PM +0200, alexis.lothore@bootlin.com wrote: > From: Alexis Lothor? > > Marvell 88E6361 is an 8-port switch derived from the > 88E6393X/88E9193X/88E6191X switches family. It can benefit from the > existing mv88e6xxx driver by simply adding the proper switch description in > the driver. Main differences with other switches from this > family are: > - 8 ports exposed (instead of 11): ports 1, 2 and 8 not available > - No 5GBase-x nor SFI/USXGMII support So what exactly is supported for link modes? The way you reuse the 6393 ops, are these differences actually enforced? It looks like mv88e6393x_phylink_get_caps() will allow 2500BaseX, 5GBaseX and 10GBaseR for port 10. > + [MV88E6361] = { > + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6361, > + .family = MV88E6XXX_FAMILY_6393, > + .name = "Marvell 88E6361", > + .num_databases = 4096, > + .num_macs = 16384, > + .num_ports = 11, > + /* Ports 1, 2 and 8 are not routed */ > + .invalid_port_mask = BIT(1) | BIT(2) | BIT(8), > + .num_internal_phys = 5, Which ports have internal PHYs? 2, 3, 4, 5, 6, 7 ? What does mv88e6xxx_phy_is_internal() return for these ports, and mv88e6xxx_get_capsmv88e6xxx_get_caps()? I'm wondering if you actually need to list 8 here? Andrew