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From:   Kathiravan T <quic_kathirav@quicinc.com>
To:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
CC:     Kathiravan T <quic_kathirav@quicinc.com>
Subject: [PATCH V3 3/3] arm64: dts: qcom: ipq5332: add few more reserved memory region
Date:   Fri, 19 May 2023 19:08:44 +0530
Message-ID: <20230519133844.23512-4-quic_kathirav@quicinc.com>
In-Reply-To: <20230519133844.23512-1-quic_kathirav@quicinc.com>
References: <20230519133844.23512-1-quic_kathirav@quicinc.com>
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In IPQ SoCs, bootloader will collect the system RAM contents upon crash for
the post morterm analysis. If we don't reserve the memory region used by
bootloader, obviously linux will consume it and upon next boot on crash,
bootloader will be loaded in the same region, which will lead to loose some
of the data, sometimes we may miss out critical information. So lets
reserve the region used by the bootloader.

Similarly SBL copies some data into the reserved region and it will be
used in the crash scenario. So reserve 1MB for SBL as well.

While at it, drop the size padding in the smem memory region.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
---
Changes in V3:
	- s/u-boot/bootloader/ in commit msg and in the code as
	  suggested by Bhupesh
Changes in V2:
	- Dropped the size padding in smem memory region
 arch/arm64/boot/dts/qcom/ipq5332.dtsi | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 753581e60604..ba1d20fd8059 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -114,6 +114,16 @@
 		#size-cells = <2>;
 		ranges;
 
+		bootloader@4a100000 {
+			reg = <0x0 0x4a100000 0x0 0x400000>;
+			no-map;
+		};
+
+		sbl@4a500000 {
+			reg = <0x0 0x4a500000 0x0 0x100000>;
+			no-map;
+		};
+
 		tz_mem: tz@4a600000 {
 			reg = <0x0 0x4a600000 0x0 0x200000>;
 			no-map;
@@ -121,7 +131,7 @@
 
 		smem@4a800000 {
 			compatible = "qcom,smem";
-			reg = <0x0 0x4a800000 0x0 0x00100000>;
+			reg = <0x0 0x4a800000 0x0 0x100000>;
 			no-map;
 
 			hwlocks = <&tcsr_mutex 0>;
-- 
2.17.1