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Date:   Sat, 20 May 2023 12:20:22 +0200
From:   Willy Tarreau <w@1wt.eu>
To:     Zhangjin Wu <falcon@tinylab.org>
Cc:     aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org,
        linux-riscv@lists.infradead.org, palmer@rivosinc.com,
        paul.walmsley@sifive.com, paulmck@kernel.org
Subject: Re: Re: [PATCH 1/2] tools/nolibc: riscv: Fix up load/store
 instructions for rv32
Message-ID: <20230520102022.GA27326@1wt.eu>
References: <20230520093307.GA27287@1wt.eu>
 <20230520100510.31605-1-falcon@tinylab.org>
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On Sat, May 20, 2023 at 06:05:10PM +0800, Zhangjin Wu wrote:
> > On Sat, May 20, 2023 at 05:11:44PM +0800, Zhangjin Wu wrote:
> > > Hi, Willy
> > > 
> > > This is a full commit message for this patch:
> > > 
> > > When compile for rv32, we got such error:
> > > 
> > > ---
> > > 
> > > nolibc/sysroot/riscv/include/arch.h:190: Error: unrecognized opcode `ld a4,0(a3)'
> > > nolibc/sysroot/riscv/include/arch.h:194: Error: unrecognized opcode `sd a3,%lo(_auxv)(a4)'
> > > nolibc/sysroot/riscv/include/arch.h:196: Error: unrecognized opcode `sd a2,%lo(environ)(a3)'
> > > 
> > > Refer to arch/riscv/include/asm/asm.h and add REG_L/REG_S macros here to let
> > > rv32 use its own lw/sw instructions.
> > > 
> > > ---
> > 
> > That's fine, thank you!
> > 
> > > I will send a new version with the above full message for you, wait for a
> > > while, very sorry ;-)
> > 
> > Don't waste your time resending, I can perfectly take that one and
> > put it into the series.
> >
> 
> Thanks very much, just found the first `---` is in the wrong line, please
> remove the '---' lines manually ;-)
> 
>     When compile nolibc application for rv32, we got such errors:
>     
>     nolibc/sysroot/riscv/include/arch.h:190: Error: unrecognized opcode `ld a4,0(a3)'
>     nolibc/sysroot/riscv/include/arch.h:194: Error: unrecognized opcode `sd a3,%lo(_auxv)(a4)'
>     nolibc/sysroot/riscv/include/arch.h:196: Error: unrecognized opcode `sd a2,%lo(environ)(a3)'
>     
>     Refer to arch/riscv/include/asm/asm.h and add REG_L/REG_S macros here to let
>     rv32 uses its own lw/sw instructions.
> 
> Btw, I wrote some new comments for the 2nd __NR_lseek patch, it is:
> 
>     riscv uses the generic include/uapi/asm-generic/unistd.h, it has code
>     like this:
>     
>         #if __BITS_PER_LONG == 64 && !defined(__SYSCALL_COMPAT)
>         #define __NR_lseek __NR3264_lseek
>         #else
>         #define __NR_llseek __NR3264_lseek
>         #endif
>     
>     There is no __NR_lseek for rv32, use __NR_llseek instead.
>     
>     This code is based on sysdeps/unix/sysv/linux/lseek.c of glibc.

Many thanks, it's indeed better this way.

> The preceeding 4 white spaces are not required for real commit messages.

Sure ;-)

Thanks
willy