Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Feedback-ID: i56a14606:Fastmail
User-Agent: Cyrus-JMAP/3.9.0-alpha0-431-g1d6a3ebb56-fm-20230511.001-g1d6a3ebb
Mime-Version: 1.0
Message-Id: <a98521a5-474a-44de-a95b-9a334b8f7fa4@app.fastmail.com>
In-Reply-To: <alpine.DEB.2.21.2305201531101.27887@angie.orcam.me.uk>
References: <20230519195135.79600-1-jiaxun.yang@flygoat.com>
 <dae342ed-8999-4fa5-b719-322182580025@app.fastmail.com>
 <alpine.DEB.2.21.2305201531101.27887@angie.orcam.me.uk>
Date:   Sat, 20 May 2023 17:13:35 +0200
From:   "Arnd Bergmann" <arnd@arndb.de>
To:     "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc:     "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
        linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
        "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
        Linux-Arch <linux-arch@vger.kernel.org>,
        "Baoquan He" <bhe@redhat.com>,
        "Huacai Chen" <chenhuacai@kernel.org>
Subject: Re: [PATCH v4] mips: add <asm-generic/io.h> including
Content-Type: text/plain
Precedence: bulk

On Sat, May 20, 2023, at 16:45, Maciej W. Rozycki wrote:
> 	if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \
> 		*__mem = __val;						\
> 	else if (cpu_has_64bits) {					\
> 		unsigned long __flags;					\
> 		type __tmp;						\
> 									\
> 		if (irq)						\
> 			local_irq_save(__flags);			\
> 		__asm__ __volatile__(					\
> 			".set	push"		"\t\t# __writeq""\n\t"	\
> 			".set	arch=r4000"			"\n\t"	\
> 			"dsll32 %L0, %L0, 0"			"\n\t"	\
> 			"dsrl32 %L0, %L0, 0"			"\n\t"	\
> 			"dsll32 %M0, %M0, 0"			"\n\t"	\
> 			"or	%L0, %L0, %M0"			"\n\t"	\
> 			"sd	%L0, %2"			"\n\t"	\
> 			".set	pop"				"\n"	\
> 			: "=r" (__tmp)					\
> 			: "0" (__val), "m" (*__mem));			\
> 		if (irq)						\
> 			local_irq_restore(__flags);			\
> 	} else								\
> 		BUG();							\
>
> etc. so we don't actually lose atomicity, because we always use 64-bit 
> operations (SD above, store-doubleword) and we BUG if they are not there 
> (i.e. with 32-bit hardware; not a build-time check as in principle the 
> same 32-bit kernel image ought to run just fine both on 32-bit and 64-bit 
> hardware).  A few MIPS platforms do use them, e.g. SB1250, which requires 
> 64-bit unswapped accesses to SoC registers.

Ok, makes sense.

     Arnd