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From:   Stanley Chu <chu.stanley@gmail.com>
Date:   Mon, 22 May 2023 14:56:00 +0800
Message-ID: <CAGaU9a8+mDgVu9-rmH944NhbSCGocADUhbdin5gQkrc_FD1xMQ@mail.gmail.com>
Subject: Re: [PATCH v5 7/7] ufs: core: Add error handling for MCQ mode
To:     "Bao D. Nguyen" <quic_nguyenb@quicinc.com>
Cc:     quic_asutoshd@quicinc.com, quic_cang@quicinc.com,
        bvanassche@acm.org, mani@kernel.org, stanley.chu@mediatek.com,
        adrian.hunter@intel.com, beanhuo@micron.com, avri.altman@wdc.com,
        martin.petersen@oracle.com, linux-scsi@vger.kernel.org,
        Alim Akhtar <alim.akhtar@samsung.com>,
        "James E.J. Bottomley" <jejb@linux.ibm.com>,
        open list <linux-kernel@vger.kernel.org>
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On Mon, May 22, 2023 at 2:48=E2=80=AFPM Stanley Chu <chu.stanley@gmail.com>=
 wrote:
>
> Hi Bao,
>
> Bao D. Nguyen <quic_nguyenb@quicinc.com> =E6=96=BC 2023=E5=B9=B45=E6=9C=
=8812=E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=882:34=E5=AF=AB=E9=81=93=
=EF=BC=9A
> >
> > Add support for error handling for MCQ mode.
> >
> > Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
> > ---
> >  drivers/ufs/core/ufshcd.c | 85 +++++++++++++++++++++++++++++++++++++++=
++------
> >  1 file changed, 74 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> > index ec07e49..9345118 100644
> > --- a/drivers/ufs/core/ufshcd.c
> > +++ b/drivers/ufs/core/ufshcd.c
> > @@ -3148,6 +3148,16 @@ static int ufshcd_wait_for_dev_cmd(struct ufs_hb=
a *hba,
> >                 err =3D -ETIMEDOUT;
> >                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d=
\n",
> >                         __func__, lrbp->task_tag);
> > +
> > +               /* MCQ mode */
> > +               if (is_mcq_enabled(hba)) {
> > +                       err =3D ufshcd_clear_cmd(hba, lrbp->task_tag);
> > +                       if (!err)
> > +                               hba->dev_cmd.complete =3D NULL;
>
> How about always clearing hba->dev_cmd.complete? If ufshcd_clear_cmd()
> fails (for example, times out), "complete" should be cleared, similar
> to the "pending" case in the SDB path.
>
> > +                       return err;
> > +               }
> > +
> > +               /* SDB mode */
> >                 if (ufshcd_clear_cmd(hba, lrbp->task_tag) =3D=3D 0) {
> >                         /* successfully cleared the command, retry if n=
eeded */
> >                         err =3D -EAGAIN;
> > @@ -5581,6 +5591,10 @@ static int ufshcd_poll(struct Scsi_Host *shost, =
unsigned int queue_num)
> >   */
> >  static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
> >  {
> > +       struct ufshcd_lrb *lrbp;
> > +       u32 hwq_num, utag;
> > +       int tag;
> > +
> >         /* Resetting interrupt aggregation counters first and reading t=
he
> >          * DOOR_BELL afterward allows us to handle all the completed re=
quests.
> >          * In order to prevent other interrupts starvation the DB is re=
ad once
> > @@ -5599,7 +5613,22 @@ static irqreturn_t ufshcd_transfer_req_compl(str=
uct ufs_hba *hba)
> >          * Ignore the ufshcd_poll() return value and return IRQ_HANDLED=
 since we
> >          * do not want polling to trigger spurious interrupt complaints=
.
> >          */
> > -       ufshcd_poll(hba->host, UFSHCD_POLL_FROM_INTERRUPT_CONTEXT);
> > +       if (!is_mcq_enabled(hba)) {
> > +               ufshcd_poll(hba->host, UFSHCD_POLL_FROM_INTERRUPT_CONTE=
XT);
> > +               goto out;
> > +       }
> > +
> > +       /* MCQ mode */
> > +       for (tag =3D 0; tag < hba->nutrs; tag++) {
> > +               lrbp =3D &hba->lrb[tag];
> > +               if (ufshcd_cmd_inflight(lrbp->cmd)) {
> > +                       utag =3D blk_mq_unique_tag(scsi_cmd_to_rq(lrbp-=
>cmd));
> > +                       hwq_num =3D blk_mq_unique_tag_to_hwq(utag);
> > +                       ufshcd_poll(hba->host, hwq_num);
> > +               }
> > +       }
>
> In SDB mode, the DOOR_BELL is reset by ufshcd_hba_stop(). All bits
> that were previously set in DOOR_BELL are also set in "completed_reqs"
> in ufshcd_poll(). This allows ufshcd_poll() to handle all outstanding
> requests properly.
>
> However, in MCQ mode, the CQ tail registers cannot provide the same
> information after they are reset. Hence, they cannot be properly
> referenced by ufshcd_poll().

A fixed version sample is as follows and has been tested on our end.

struct scsi_cmnd *cmd;

for (tag =3D 0; tag < hba->nutrs; tag++) {
        lrbp =3D &hba->lrb[tag];
        cmd =3D lrbp->cmd;
        if (ufshcd_cmd_inflight(cmd)) {
                set_host_byte(cmd, DID_ERROR);
                ufshcd_release_scsi_cmd(hba, lrbp);
                scsi_done(cmd);
        }
}

Thanks,
Stanley Chu