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Received: from PH7PR12MB5712.namprd12.prod.outlook.com (2603:10b6:510:1e3::13) by BL1PR12MB5336.namprd12.prod.outlook.com (2603:10b6:208:314::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.29; Tue, 23 May 2023 06:04:13 +0000 Received: from PH7PR12MB5712.namprd12.prod.outlook.com ([fe80::d1a6:3a8:a6dd:b094]) by PH7PR12MB5712.namprd12.prod.outlook.com ([fe80::d1a6:3a8:a6dd:b094%2]) with mapi id 15.20.6411.027; Tue, 23 May 2023 06:04:12 +0000 Message-ID: <10695901-8f38-1177-19e3-74b42d060758@amd.com> Date: Tue, 23 May 2023 11:33:54 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH V2 2/6] perf: Add branch stack extension To: kan.liang@linux.intel.com Cc: linux-kernel@vger.kernel.org, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, irogers@google.com, adrian.hunter@intel.com, ak@linux.intel.com, eranian@google.com, alexey.v.bayduraev@linux.intel.com, tinghao.zhang@intel.com, Ravi Bangoria , Athira Rajeev References: <20230522113040.2329924-1-kan.liang@linux.intel.com> <20230522113040.2329924-2-kan.liang@linux.intel.com> Content-Language: en-US From: Sandipan Das In-Reply-To: <20230522113040.2329924-2-kan.liang@linux.intel.com> Content-Type: text/plain; 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With more and more information added, the space is running out. > For example, the information of occurrences of events will be added for > each branch. > > Add an extension space to record the new information for each branch > entry. The space is appended after the struct perf_branch_stack. > > Add a bit in struct perf_branch_entry to indicate whether the extra > information is included. > > Reviewed-by: Andi Kleen > Signed-off-by: Kan Liang > Cc: Sandipan Das > Cc: Ravi Bangoria > Cc: Athira Rajeev > --- > > New patch > - Introduce a generic extension space which can be used to > store the LBR event information for Intel. It can also be used by > other ARCHs for the other purpose. > - Add a new bit in struct perf_branch_entry to indicate whether the > extra information is included. > > arch/powerpc/perf/core-book3s.c | 2 +- > arch/x86/events/amd/core.c | 2 +- > arch/x86/events/intel/core.c | 2 +- > arch/x86/events/intel/ds.c | 4 ++-- > include/linux/perf_event.h | 18 +++++++++++++++++- > include/uapi/linux/perf_event.h | 4 +++- > kernel/events/core.c | 5 +++++ > 7 files changed, 30 insertions(+), 7 deletions(-) > This seems to be missing the following: diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 6310fc5c9f52..b6739f63dc34 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1704,7 +1704,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs) perf_sample_data_init(&data, 0, event->hw.last_period); if (has_branch_stack(event)) - perf_sample_save_brstack(&data, event, &cpuc->lbr_stack); + perf_sample_save_brstack(&data, event, &cpuc->lbr_stack, NULL); if (perf_event_overflow(event, &data, regs)) x86_pmu_stop(event, 0); Otherwise, the changes look good to me. Reviewed-by: Sandipan Das