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Tue, 23 May 2023 06:46:36 +0000 Date: Tue, 23 May 2023 14:21:30 +0800 From: Yan Zhao To: Robert Hoo CC: , , , Subject: Re: [PATCH v2 5/6] KVM: x86: Keep a per-VM MTRR state Message-ID: Reply-To: Yan Zhao References: <20230509134825.1523-1-yan.y.zhao@intel.com> <20230509135300.1855-1-yan.y.zhao@intel.com> <3f09e751-33fd-7d60-78cd-6857d113e8bd@gmail.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <3f09e751-33fd-7d60-78cd-6857d113e8bd@gmail.com> X-ClientProxiedBy: SG2P153CA0004.APCP153.PROD.OUTLOOK.COM (2603:1096::14) To PH7PR11MB5957.namprd11.prod.outlook.com (2603:10b6:510:1e0::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH7PR11MB5957:EE_|DS7PR11MB6176:EE_ X-MS-Office365-Filtering-Correlation-Id: a532efbf-1fe2-4bb8-532e-08db5b597407 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Xg8XyXggjSA+A1ap9vUQ1hnycIspwJyOdGCyzgRP+X0grPDaEnOZcvuZ5GXfK9Uq3JmvgU01suwt09/3wXpocKgO+8OxZIynogojZW4py9SC/DeFczN7dTk75uHn+VaVjwjyL8k/qwXxN9+ILunDnaXzU2u2CaUUEBjwtIV/U/kHlBZ/38nosBfX0L/aJfDLwowvcj6rh6NZ6BcMOWwYdfA5u9BFDmuguJq14nmqY0Mb4uowkHJnxR6ccHmD+tiSqfc0OvEHVd+uonIkSvLfknCFN7cseE9JCjKiVZ1VZjQEk10PZE7nhUIEAfN/iRBa2fv5TQX/6Ae77Ckck5HxElPSmVj5W7jtTuB21KSuwFD1b/2anKTXK0AMgDE5BLaQjHX1Sc7gstdj4MgGoOvaG5AHFjruurpUbhQbIeQAF4rpRnRNU0CR7r2/XlKEQ5POQCw4rOWun77k5i5R6jrja2CqPoeXjUYqV3c88xVdrGx4rwzHb84SQR28OeLp0qJDeONVzr8+vT0R5kdkR/Yc/wLoi6USVEvx4mn3n6CQk4TnlMXPQbGX1Lo1DC+pDXj3 X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PH7PR11MB5957.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(136003)(396003)(366004)(346002)(39860400002)(376002)(451199021)(66946007)(66556008)(6916009)(66476007)(478600001)(41300700001)(6486002)(6666004)(316002)(5660300002)(86362001)(8936002)(4326008)(8676002)(38100700002)(53546011)(3450700001)(82960400001)(186003)(6506007)(26005)(2906002)(6512007)(83380400001);DIR:OUT;SFP:1102; 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The P6 and more recent processor > families provide no hardware support for maintaining this consistency." > > leaving each vCPU's MTRR is just to fully mimic HW? > Yes, leaving each vCPU's MTRR to mimic HW. As also suggested in SDM, the guest OS manipulates MTRRs in this way: for each online CPUs { disable MTRR update fixed/var MTRR ranges enable MTRR } Guest OS needs to access memory only after this full pattern. So, I think there should not have "hazard of inconsistency among per-VPU MTRR states". I want to have per-VM MTRR state is because I want to reduce unnessary EPT zap, which costs quite a lot cpu cycles even when the EPT is empty. In this patch, per-VM MTRR pointer is used to point to vCPU 0's MTRR state, so that it can save some memory to keep the MTRR state. But I found out that it would only work when vCPU 0 (boot processor) is always online (which is not true for x86 under some configration). I'll try to find out lowest online vCPU and keep a per-VM copy of MTRR state in next version. Thanks!