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[209.85.219.176]) by smtp.gmail.com with ESMTPSA id b10-20020a81670a000000b00555d2944284sm2664885ywc.67.2023.05.22.23.59.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 May 2023 23:59:23 -0700 (PDT) Received: by mail-yb1-f176.google.com with SMTP id 3f1490d57ef6-ba80dc46972so10174597276.2; Mon, 22 May 2023 23:59:22 -0700 (PDT) X-Received: by 2002:a0d:f407:0:b0:559:ea89:7c2c with SMTP id d7-20020a0df407000000b00559ea897c2cmr12284559ywf.33.1684825162595; Mon, 22 May 2023 23:59:22 -0700 (PDT) MIME-Version: 1.0 References: <9e66262a754fcba50208aa424188896cc52a1dd1.1683365892.git.fthain@linux-m68k.org> <14e09781-6ffd-0834-fba4-427e5030f2be@gmail.com> In-Reply-To: <14e09781-6ffd-0834-fba4-427e5030f2be@gmail.com> From: Geert Uytterhoeven Date: Tue, 23 May 2023 08:59:11 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 1/1] m68k: Move signal frame following exception on 68020/030 To: Michael Schmitz Cc: Finn Thain , Andreas Schwab , stable@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Michael, On Tue, May 23, 2023 at 3:11 AM Michael Schmitz wrote: > On 22/05/23 23:41, Geert Uytterhoeven wrote: > > On Sat, May 6, 2023 at 11:36 AM Finn Thain wrote: > >> On 68030/020, an instruction such as, moveml %a2-%a3/%a5,%sp@- may cause > >> a stack page fault during instruction execution (i.e. not at an > >> instruction boundary) and produce a format 0xB exception frame. > >> > >> In this situation, the value of USP will be unreliable. If a signal is to > >> be delivered following the exception, this USP value is used to calculate > >> the location for a signal frame. This can result in a corrupted user > >> stack. > >> > >> The corruption was detected in dash (actually in glibc) where it showed > >> up as an intermittent "stack smashing detected" message and crash > >> following signal delivery for SIGCHLD. > >> > >> It was hard to reproduce that failure because delivery of the signal > >> raced with the page fault and because the kernel places an unpredictable > >> gap of up to 7 bytes between the USP and the signal frame. > >> > >> A format 0xB exception frame can be produced by a bus error or an address > >> error. The 68030 Users Manual says that address errors occur immediately > >> upon detection during instruction prefetch. The instruction pipeline > >> allows prefetch to overlap with other instructions, which means an > >> address error can arise during the execution of a different instruction. > >> So it seems likely that this patch may help in the address error case also. > >> > >> Reported-and-tested-by: Stan Johnson > >> Link: https://lore.kernel.org/all/CAMuHMdW3yD22_ApemzW_6me3adq6A458u1_F0v-1EYwK_62jPA@mail.gmail.com/ > >> Cc: Michael Schmitz > >> Cc: Andreas Schwab > >> Cc: stable@vger.kernel.org > >> Co-developed-by: Michael Schmitz > >> Signed-off-by: Michael Schmitz > >> Signed-off-by: Finn Thain > > Reviewed-by: Geert Uytterhoeven > > i.e. will queue as a fix in the m68k for-v6.4 branch. > > > > I plan to send this upstream later this week, so any additional > > testing would be appreciated. > > I've given this some lengthy stress testing, and haven't seen it fail once. > > In contrast, various attempts of mine to improve on the concept (by only > moving the signal frame away from the USP in case it's likely to clash) > sometimes came up against a kernel bus error in setup_frame() when > copying the signo to the signal frame. I must be making some incorrect > assumptions still ... > > Limiting the signal frame shift to bus fault exceptions that happen > mid-instruction is not too much of an overhead even in low memory > settings, and using 256 bytes (the largest possible operand size, i.e. > the largest adjustment to USP that might occur on completion of the > interrupted instruction) did not seem to cause any issues with stack > growth either. > > I can give this some more testing in ARAnyM (extending the stack shift > to format 7 frames) but I'd say it's got as much testing on 030 hardware > as we can do. Thank you for your continued testing! And thanks a lot to anyone involved in nailing this issue! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds