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Bottomley" , "open list" References: <7b884263c9db9a9666086a345ede85bb56d9dfc7.1683872601.git.quic_nguyenb@quicinc.com> From: "Bao D. Nguyen" In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: AlSrd92oLc9IXbv54LCDeg7fNDI3iais X-Proofpoint-GUID: AlSrd92oLc9IXbv54LCDeg7fNDI3iais X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-23_04,2023-05-22_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 bulkscore=0 adultscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305230057 X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/21/2023 11:56 PM, Stanley Chu wrote: > On Mon, May 22, 2023 at 2:48 PM Stanley Chu wrote: >> >> Hi Bao, >> >> Bao D. Nguyen 於 2023年5月12日 週五 下午2:34寫道: >>> >>> Add support for error handling for MCQ mode. >>> >>> Signed-off-by: Bao D. Nguyen >>> --- >>> drivers/ufs/core/ufshcd.c | 85 +++++++++++++++++++++++++++++++++++++++++------ >>> 1 file changed, 74 insertions(+), 11 deletions(-) >>> >>> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c >>> index ec07e49..9345118 100644 >>> --- a/drivers/ufs/core/ufshcd.c >>> +++ b/drivers/ufs/core/ufshcd.c >>> @@ -3148,6 +3148,16 @@ static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba, >>> err = -ETIMEDOUT; >>> dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n", >>> __func__, lrbp->task_tag); >>> + >>> + /* MCQ mode */ >>> + if (is_mcq_enabled(hba)) { >>> + err = ufshcd_clear_cmd(hba, lrbp->task_tag); >>> + if (!err) >>> + hba->dev_cmd.complete = NULL; >> >> How about always clearing hba->dev_cmd.complete? If ufshcd_clear_cmd() >> fails (for example, times out), "complete" should be cleared, similar >> to the "pending" case in the SDB path. >> >>> + return err; >>> + } >>> + >>> + /* SDB mode */ >>> if (ufshcd_clear_cmd(hba, lrbp->task_tag) == 0) { >>> /* successfully cleared the command, retry if needed */ >>> err = -EAGAIN; >>> @@ -5581,6 +5591,10 @@ static int ufshcd_poll(struct Scsi_Host *shost, unsigned int queue_num) >>> */ >>> static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba) >>> { >>> + struct ufshcd_lrb *lrbp; >>> + u32 hwq_num, utag; >>> + int tag; >>> + >>> /* Resetting interrupt aggregation counters first and reading the >>> * DOOR_BELL afterward allows us to handle all the completed requests. >>> * In order to prevent other interrupts starvation the DB is read once >>> @@ -5599,7 +5613,22 @@ static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba) >>> * Ignore the ufshcd_poll() return value and return IRQ_HANDLED since we >>> * do not want polling to trigger spurious interrupt complaints. >>> */ >>> - ufshcd_poll(hba->host, UFSHCD_POLL_FROM_INTERRUPT_CONTEXT); >>> + if (!is_mcq_enabled(hba)) { >>> + ufshcd_poll(hba->host, UFSHCD_POLL_FROM_INTERRUPT_CONTEXT); >>> + goto out; >>> + } >>> + >>> + /* MCQ mode */ >>> + for (tag = 0; tag < hba->nutrs; tag++) { >>> + lrbp = &hba->lrb[tag]; >>> + if (ufshcd_cmd_inflight(lrbp->cmd)) { >>> + utag = blk_mq_unique_tag(scsi_cmd_to_rq(lrbp->cmd)); >>> + hwq_num = blk_mq_unique_tag_to_hwq(utag); >>> + ufshcd_poll(hba->host, hwq_num); >>> + } >>> + } >> >> In SDB mode, the DOOR_BELL is reset by ufshcd_hba_stop(). All bits >> that were previously set in DOOR_BELL are also set in "completed_reqs" >> in ufshcd_poll(). This allows ufshcd_poll() to handle all outstanding >> requests properly. >> >> However, in MCQ mode, the CQ tail registers cannot provide the same >> information after they are reset. Hence, they cannot be properly >> referenced by ufshcd_poll(). > > A fixed version sample is as follows and has been tested on our end. Thank you Stanley. I will make the change. > > struct scsi_cmnd *cmd; > > for (tag = 0; tag < hba->nutrs; tag++) { > lrbp = &hba->lrb[tag]; > cmd = lrbp->cmd; > if (ufshcd_cmd_inflight(cmd)) { > set_host_byte(cmd, DID_ERROR); > ufshcd_release_scsi_cmd(hba, lrbp); > scsi_done(cmd); > } > } > > Thanks, > Stanley Chu