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Message-ID: <d1baccf7-c689-fc40-d616-855c253021fc@linux.intel.com>
Date:   Tue, 23 May 2023 09:34:56 -0500
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Subject: Re: [PATCH V2 2/9] ASoC: amd: ps: handle SoundWire interrupts in acp
 pci driver
Content-Language: en-US
To:     "Mukunda,Vijendar" <vijendar.mukunda@amd.com>, broonie@kernel.org
Cc:     alsa-devel@alsa-project.org, Basavaraj.Hiregoudar@amd.com,
        Sunil-kumar.Dommati@amd.com, Mastan.Katragadda@amd.com,
        Arungopal.kondaveeti@amd.com, mario.limonciello@amd.com,
        Liam Girdwood <lgirdwood@gmail.com>,
        Jaroslav Kysela <perex@perex.cz>,
        Takashi Iwai <tiwai@suse.com>,
        Syed Saba Kareem <Syed.SabaKareem@amd.com>,
        open list <linux-kernel@vger.kernel.org>
References: <20230522133122.166841-1-Vijendar.Mukunda@amd.com>
 <20230522133122.166841-3-Vijendar.Mukunda@amd.com>
 <134a2efd-648a-fb4b-4b61-154173b97f04@linux.intel.com>
 <2e8d3af4-7d54-becf-1084-c9b07a3436d0@amd.com>
From:   Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
In-Reply-To: <2e8d3af4-7d54-becf-1084-c9b07a3436d0@amd.com>
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Precedence: bulk


>>>  static void acp63_disable_interrupts(void __iomem *acp_base)
>>> @@ -102,23 +103,55 @@ static irqreturn_t acp63_irq_handler(int irq, void *dev_id)
>>>  {
>>>  	struct acp63_dev_data *adata;
>>>  	struct pdm_dev_data *ps_pdm_data;
>>> -	u32 val;
>>> +	struct amd_sdw_manager *amd_manager;
>>> +	u32 ext_intr_stat, ext_intr_stat1;
>>> +	u16 irq_flag = 0;
>>>  	u16 pdev_index;
>>>  
>>>  	adata = dev_id;
>>>  	if (!adata)
>>>  		return IRQ_NONE;
>>> +	ext_intr_stat = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>>> +	if (ext_intr_stat & ACP_SDW0_STAT) {
>>> +		writel(ACP_SDW0_STAT, adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>> [1]
>>
>> this is confusing, if this is w1c, should this be:
>>
>> writel(ext_intr_stat, adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
>>
>> Otherwise you may be clearing fields that have not been set?
> As per our register spec, writing zero to register fields doesn't
> have any effect. Only writing 1 to register bit will clear that
> interrupt.
> We are handling bit by bit irq check and clearing the irq mask
> based on irq bit and take an action related to that particular irq
> bit.

Right, maybe an explanation in the commit message would help.