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Tue, 23 May 2023 18:25:33 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v4 14/23] cxl/port: Remove Component Register base address from struct cxl_port Date: Tue, 23 May 2023 18:22:05 -0500 Message-ID: <20230523232214.55282-15-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230523232214.55282-1-terry.bowman@amd.com> References: <20230523232214.55282-1-terry.bowman@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT108:EE_|PH0PR12MB5629:EE_ X-MS-Office365-Filtering-Correlation-Id: 112863d9-ecdb-47db-3853-08db5be50324 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2btIc88zL8Uds4uVFdY1NOO++2PATW7HKyQ+SmSon9cBIOxq2raYYswHfCn69+6n5aHYT5Ox6Eo/OSNdoeh0zltC9JmK335QoRq82FVd0AuFl2D8DtZzujHbUK4+imutf0EKQg7igzBDp3ffg0voxEdsJXf4m2WvvSqZy6BRSiN8eed4F9H9ALprReu0BI10zmxlv/XhrHg84YoSZPEOaZricKtr1kwts5PAR6VFAiWFfGOpANZg6iZmn26HNYAxZcsZq4rx3doSI0BBt9g0phSjPFNcZqEgciJwCkxil6iandXBsJW6Kc00T/5a5/mwstBXAUPfS7SB9taix/FcmtTLEDzaEsIutll+c17hcwe81uaKUfcmmzNA04Bz05bLmnHq8w1V8ty7srJq9NMlf1OtPRANbtB+orcfynItultE72azM/VO8jFIaO3WLPCWjhsCkPFSjsi7T6Nfj7RY717YWcNHQpUXZQSvTXN36cICp2ENrmiWH0T95l9muOmmbrRksfbdzvBMB54yaagxQbZlVyT47RnkzSUSiPWhNfre1E5Xiw1QPAwrye1Y6+QEAHwp61n1Alm/QRiTYpsWiIGJtd69/uh++skCEGrczyevAUlNoG4K68jN+VM7YNnIv5VYZqB4dEFRB7S38RhHXfQ27IoiAFOAGsLtQE6yueYv3/i2DqDqdw/HOg+NpUDy7+h3QIPq5tISo/LjeLqGvX/n9Muow8rUb6i9bvGeQ0v8+GAab76VeXArHBBvXqZNfQEtbhqznCRRjtUoZZKoMA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(376002)(396003)(346002)(39860400002)(451199021)(46966006)(40470700004)(36840700001)(47076005)(8676002)(8936002)(5660300002)(7416002)(82310400005)(44832011)(36860700001)(16526019)(186003)(81166007)(336012)(86362001)(2616005)(26005)(1076003)(82740400003)(356005)(426003)(83380400001)(40460700003)(6666004)(41300700001)(7696005)(40480700001)(70206006)(70586007)(316002)(478600001)(36756003)(4326008)(54906003)(110136005)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 May 2023 23:25:35.9994 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 112863d9-ecdb-47db-3853-08db5be50324 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT108.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5629 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Robert Richter The Component Register base address @component_reg_phys is no longer used after the rework of the Component Register setup which now uses struct member @comp_map instead. Remove the base address. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman --- drivers/cxl/core/port.c | 4 +--- drivers/cxl/cxl.h | 2 -- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index db2ba0c886e2..183f9f8548e2 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -615,7 +615,6 @@ static int devm_cxl_link_parent_dport(struct device *host, static struct lock_class_key cxl_port_key; static struct cxl_port *cxl_port_alloc(struct device *uport, - resource_size_t component_reg_phys, struct cxl_dport *parent_dport) { struct cxl_port *port; @@ -665,7 +664,6 @@ static struct cxl_port *cxl_port_alloc(struct device *uport, } else dev->parent = uport; - port->component_reg_phys = component_reg_phys; ida_init(&port->decoder_ida); port->hdm_end = -1; port->commit_end = -1; @@ -724,7 +722,7 @@ static struct cxl_port *__devm_cxl_add_port(struct device *host, struct device *dev; int rc; - port = cxl_port_alloc(uport, component_reg_phys, parent_dport); + port = cxl_port_alloc(uport, parent_dport); if (IS_ERR(port)) return port; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index dc83c1d0396e..4365d46606df 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -556,7 +556,6 @@ struct cxl_dax_region { * @nr_dports: number of entries in @dports * @hdm_end: track last allocated HDM decoder instance for allocation ordering * @commit_end: cursor to track highest committed decoder for commit ordering - * @component_reg_phys: component register capability base address (optional) * @dead: last ep has been removed, force port re-creation * @depth: How deep this port is relative to the root. depth 0 is the root. * @cdat: Cached CDAT data @@ -576,7 +575,6 @@ struct cxl_port { int nr_dports; int hdm_end; int commit_end; - resource_size_t component_reg_phys; bool dead; unsigned int depth; struct cxl_cdat { -- 2.34.1