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From:   "Limonciello, Mario" <Mario.Limonciello@amd.com>
To:     Lukas Wunner <lukas@wunner.de>
CC:     Bjorn Helgaas <bhelgaas@google.com>,
        Mika Westerberg <mika.westerberg@linux.intel.com>,
        "Rafael J . Wysocki" <rafael@kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "S-k, Shyam-sundar" <Shyam-sundar.S-k@amd.com>,
        "Natikar, Basavaraj" <Basavaraj.Natikar@amd.com>,
        "Deucher, Alexander" <Alexander.Deucher@amd.com>,
        "linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
        Iain Lane <iain@orangesquash.org.uk>
Subject: RE: [PATCH v3] PCI: Don't assume root ports from > 2015 are power
 manageable
Thread-Topic: [PATCH v3] PCI: Don't assume root ports from > 2015 are power
 manageable
Thread-Index: AQHZjlOGnEBduEAsg06kATHaVNuSQq9pkLcAgAAGsDA=
Date:   Wed, 24 May 2023 16:16:20 +0000
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References: <20230524152136.1033-1-mario.limonciello@amd.com>
 <20230524154454.GA28455@wunner.de>
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[AMD Official Use Only - General]

> -----Original Message-----
> From: Lukas Wunner <lukas@wunner.de>
> Sent: Wednesday, May 24, 2023 10:45 AM
> To: Limonciello, Mario <Mario.Limonciello@amd.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>; Mika Westerberg
> <mika.westerberg@linux.intel.com>; Rafael J . Wysocki <rafael@kernel.org>=
;
> linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org; S-k, Shyam-sunda=
r
> <Shyam-sundar.S-k@amd.com>; Natikar, Basavaraj
> <Basavaraj.Natikar@amd.com>; Deucher, Alexander
> <Alexander.Deucher@amd.com>; linux-pm@vger.kernel.org; Iain Lane
> <iain@orangesquash.org.uk>
> Subject: Re: [PATCH v3] PCI: Don't assume root ports from > 2015 are powe=
r
> manageable
>
> On Wed, May 24, 2023 at 10:21:36AM -0500, Mario Limonciello wrote:
> > --- a/drivers/pci/pci.c
> > +++ b/drivers/pci/pci.c
> > @@ -2976,6 +2976,9 @@ bool pci_bridge_d3_possible(struct pci_dev
> *bridge)
> >
> >     switch (pci_pcie_type(bridge)) {
> >     case PCI_EXP_TYPE_ROOT_PORT:
> > +           if (!platform_pci_power_manageable(bridge))
> > +                   return false;
> > +           fallthrough;
> >     case PCI_EXP_TYPE_UPSTREAM:
> >     case PCI_EXP_TYPE_DOWNSTREAM:
> >             if (pci_bridge_d3_disable)
>
> This will exempt the Root Ports from pcie_port_pm=3Dforce.
> Not sure if that's desirable.

Right; It will only exempt root ports from pcie_port_pm=3Dforce
if they aren't power manageable.

If it's still desirable to let pcie_port_pm=3Dforce work on these
I think it's worth refactoring the function otherwise it's going
to be a nested if that matches the same variable as the
switch.

Something like this:

bool pci_bridge_d3_possible(struct pci_dev *bridge)
{
        if (!pci_is_pcie(bridge))
                return false;

        switch (pci_pcie_type(bridge)) {
        case PCI_EXP_TYPE_ROOT_PORT:
        case PCI_EXP_TYPE_UPSTREAM:
        case PCI_EXP_TYPE_DOWNSTREAM:
                break;
        default:
                return false;
        }

        if (pci_bridge_d3_disable)
                return false;

        /*
         * Hotplug ports handled by firmware in System Management Mode
         * may not be put into D3 by the OS (Thunderbolt on non-Macs).
         */
        if (bridge->is_hotplug_bridge && !pciehp_is_native(bridge))
                return false;

        if (pci_bridge_d3_force)
                return true;

        /* Even the oldest 2010 Thunderbolt controller supports D3. */
        if (bridge->is_thunderbolt)
                return true;

        /* Platform might know better if the bridge supports D3 */
        if (platform_pci_bridge_d3(bridge))
                return true;

        /*
         * Hotplug ports handled natively by the OS were not validated
         * by vendors for runtime D3 at least until 2018 because there
         * was no OS support.
         */
        if (bridge->is_hotplug_bridge)
                return false;

        if (dmi_check_system(bridge_d3_blacklist))
                return false;

        /*
         * It should be safe to put PCIe ports from 2015 or newer
         * to D3.
         */
        if (dmi_get_bios_year() >=3D 2015)
                return true;

        return false;
}

Then the check I'm proposing can injected anywhere after the force like thi=
s:

if (pci_pcie_type(bridge) =3D=3D PCI_EXP_TYPE_ROOT_PORT &&
    !platform_pci_power_manageable(bridge)))
        return false;