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From:   "Rafael J. Wysocki" <rafael@kernel.org>
Date:   Wed, 24 May 2023 19:29:05 +0200
Message-ID: <CAJZ5v0gv_7CVk4JoEvoxC6ZiRXF=HoHbXytmGKDs_x67GdRaWw@mail.gmail.com>
Subject: Re: [PATCH v3] PCI: Don't assume root ports from > 2015 are power manageable
To:     "Limonciello, Mario" <Mario.Limonciello@amd.com>
Cc:     Lukas Wunner <lukas@wunner.de>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Mika Westerberg <mika.westerberg@linux.intel.com>,
        "Rafael J . Wysocki" <rafael@kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "S-k, Shyam-sundar" <Shyam-sundar.S-k@amd.com>,
        "Natikar, Basavaraj" <Basavaraj.Natikar@amd.com>,
        "Deucher, Alexander" <Alexander.Deucher@amd.com>,
        "linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
        Iain Lane <iain@orangesquash.org.uk>
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On Wed, May 24, 2023 at 6:16 PM Limonciello, Mario
<Mario.Limonciello@amd.com> wrote:
>
> [AMD Official Use Only - General]
>
> > -----Original Message-----
> > From: Lukas Wunner <lukas@wunner.de>
> > Sent: Wednesday, May 24, 2023 10:45 AM
> > To: Limonciello, Mario <Mario.Limonciello@amd.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>; Mika Westerberg
> > <mika.westerberg@linux.intel.com>; Rafael J . Wysocki <rafael@kernel.org>;
> > linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org; S-k, Shyam-sundar
> > <Shyam-sundar.S-k@amd.com>; Natikar, Basavaraj
> > <Basavaraj.Natikar@amd.com>; Deucher, Alexander
> > <Alexander.Deucher@amd.com>; linux-pm@vger.kernel.org; Iain Lane
> > <iain@orangesquash.org.uk>
> > Subject: Re: [PATCH v3] PCI: Don't assume root ports from > 2015 are power
> > manageable
> >
> > On Wed, May 24, 2023 at 10:21:36AM -0500, Mario Limonciello wrote:
> > > --- a/drivers/pci/pci.c
> > > +++ b/drivers/pci/pci.c
> > > @@ -2976,6 +2976,9 @@ bool pci_bridge_d3_possible(struct pci_dev
> > *bridge)
> > >
> > >     switch (pci_pcie_type(bridge)) {
> > >     case PCI_EXP_TYPE_ROOT_PORT:
> > > +           if (!platform_pci_power_manageable(bridge))
> > > +                   return false;
> > > +           fallthrough;
> > >     case PCI_EXP_TYPE_UPSTREAM:
> > >     case PCI_EXP_TYPE_DOWNSTREAM:
> > >             if (pci_bridge_d3_disable)
> >
> > This will exempt the Root Ports from pcie_port_pm=force.
> > Not sure if that's desirable.
>
> Right; It will only exempt root ports from pcie_port_pm=force
> if they aren't power manageable.
>
> If it's still desirable to let pcie_port_pm=force work on these
> I think it's worth refactoring the function otherwise it's going
> to be a nested if that matches the same variable as the
> switch.
>
> Something like this:
>
> bool pci_bridge_d3_possible(struct pci_dev *bridge)
> {
>         if (!pci_is_pcie(bridge))
>                 return false;
>
>         switch (pci_pcie_type(bridge)) {
>         case PCI_EXP_TYPE_ROOT_PORT:
>         case PCI_EXP_TYPE_UPSTREAM:
>         case PCI_EXP_TYPE_DOWNSTREAM:
>                 break;
>         default:
>                 return false;
>         }
>
>         if (pci_bridge_d3_disable)
>                 return false;
>
>         /*
>          * Hotplug ports handled by firmware in System Management Mode
>          * may not be put into D3 by the OS (Thunderbolt on non-Macs).
>          */
>         if (bridge->is_hotplug_bridge && !pciehp_is_native(bridge))
>                 return false;
>
>         if (pci_bridge_d3_force)
>                 return true;
>
>         /* Even the oldest 2010 Thunderbolt controller supports D3. */
>         if (bridge->is_thunderbolt)
>                 return true;
>
>         /* Platform might know better if the bridge supports D3 */
>         if (platform_pci_bridge_d3(bridge))
>                 return true;
>
>         /*
>          * Hotplug ports handled natively by the OS were not validated
>          * by vendors for runtime D3 at least until 2018 because there
>          * was no OS support.
>          */
>         if (bridge->is_hotplug_bridge)
>                 return false;
>
>         if (dmi_check_system(bridge_d3_blacklist))
>                 return false;
>
>         /*
>          * It should be safe to put PCIe ports from 2015 or newer
>          * to D3.
>          */
>         if (dmi_get_bios_year() >= 2015)
>                 return true;
>
>         return false;
> }
>
> Then the check I'm proposing can injected anywhere after the force like this:
>
> if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT &&
>     !platform_pci_power_manageable(bridge)))
>         return false;

Sounds reasonable.  I would even put it after the Thunderbolt check.