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Shutemov" To: Thomas Gleixner Cc: LKML , x86@kernel.org, David Woodhouse , Andrew Cooper , Brian Gerst , Arjan van de Veen , Paolo Bonzini , Paul McKenney , Tom Lendacky , Sean Christopherson , Oleksandr Natalenko , Paul Menzel , "Guilherme G. Piccoli" , Piotr Gorski , Usama Arif , Juergen Gross , Boris Ostrovsky , xen-devel@lists.xenproject.org, Russell King , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Guo Ren , linux-csky@vger.kernel.org, Thomas Bogendoerfer , linux-mips@vger.kernel.org, "James E.J. Bottomley" , Helge Deller , linux-parisc@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , linux-riscv@lists.infradead.org, Mark Rutland , Sabin Rapan , "Michael Kelley (LINUX)" , Dave Hansen Subject: Re: [patch v3 31/36] x86/apic: Provide cpu_primary_thread mask Message-ID: <20230524204818.3tjlwah2euncxzmh@box.shutemov.name> References: <20230508181633.089804905@linutronix.de> <20230508185218.962208640@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230508185218.962208640@linutronix.de> X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 08, 2023 at 09:44:17PM +0200, Thomas Gleixner wrote: > From: Thomas Gleixner > > Make the primary thread tracking CPU mask based in preparation for simpler > handling of parallel bootup. > > Signed-off-by: Thomas Gleixner > Tested-by: Michael Kelley > > > --- > arch/x86/include/asm/apic.h | 2 -- > arch/x86/include/asm/topology.h | 19 +++++++++++++++---- > arch/x86/kernel/apic/apic.c | 20 +++++++++----------- > arch/x86/kernel/smpboot.c | 12 +++--------- > 4 files changed, 27 insertions(+), 26 deletions(-) > --- > ... > @@ -2386,20 +2386,16 @@ bool arch_match_cpu_phys_id(int cpu, u64 > } > > #ifdef CONFIG_SMP > -/** > - * apic_id_is_primary_thread - Check whether APIC ID belongs to a primary thread > - * @apicid: APIC ID to check > - */ > -bool apic_id_is_primary_thread(unsigned int apicid) > +static void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) > { > - u32 mask; > - > - if (smp_num_siblings == 1) > - return true; > /* Isolate the SMT bit(s) in the APICID and check for 0 */ > - mask = (1U << (fls(smp_num_siblings) - 1)) - 1; > - return !(apicid & mask); > + u32 mask = (1U << (fls(smp_num_siblings) - 1)) - 1; > + > + if (smp_num_siblings == 1 || !(apicid & mask)) > + cpumask_set_cpu(cpu, &__cpu_primary_thread_mask); > } > +#else > +static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { } > #endif > > /* This patch causes boot regression on TDX guest. The guest crashes on SMP bring up. The change makes use of smp_num_siblings earlier than before: the mask get constructed in acpi_boot_init() codepath. Later on smp_num_siblings gets updated in detect_ht(). In my setup with 16 vCPUs, smp_num_siblings is 16 before detect_ht() and set to 1 in detect_ht(). -- Kiryl Shutsemau / Kirill A. Shutemov