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Date:   Wed, 24 May 2023 14:03:44 -0700
In-Reply-To: <20230310105346.12302-4-likexu@tencent.com>
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Subject: Re: [PATCH 3/5] KVM: x86/pmu: Move the overflow of a normal counter
 out of PMI context
From:   Sean Christopherson <seanjc@google.com>
To:     Like Xu <like.xu.linux@gmail.com>
Cc:     Paolo Bonzini <pbonzini@redhat.com>,
        Ravi Bangoria <ravi.bangoria@amd.com>, kvm@vger.kernel.org,
        linux-kernel@vger.kernel.org
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On Fri, Mar 10, 2023, Like Xu wrote:
> From: Like Xu <likexu@tencent.com>
> 
> >From the guest's point of view, vPMU's global_status bit update following
> a counter overflow is completely independent of whether it is emulated
> in the host PMI context. The guest counter overflow emulation only depends
> on whether pmc->counter has an overflow or not. Plus the counter overflow
> generated by the emulation instruction has been delayed and not been
> handled in the PMI context. This part of the logic can be unified by
> reusing pmc->prev_counter for a normal counter.

I've asked many times.  Please write changelogs that state what the patch actually
does, not what "can" be done.  The other patches in this series have similar problems,
e.g. desribe the state _after_ the patch is applied, not what the patch does.

IIUC, this is effectively deferring injection to kvm_pmu_handle_event() and
kvm_pmu_handle_pmc_overflow().  The changelog says nothing of the sort though.

> However for a PEBS counter, its buffer overflow irq still requires hardware to
> trigger PMI.

I didn't follow this.  Hardware isn't triggering the PMI the guest sees, that's
still coming from KVM.  Are you saying that KVM doesn't have a way to detect
overflow for PEBS counters, i.e. would drop the PMI as the hardware PMI is the
only notification KVM gets?