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Thu, 25 May 2023 07:21:06 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34P7L4i0030027 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 25 May 2023 07:21:04 GMT Received: from [10.253.35.57] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Thu, 25 May 2023 00:21:00 -0700 Message-ID: Date: Thu, 25 May 2023 15:20:58 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v4 02/11] coresight-tpda: Add DSB dataset support Content-Language: en-US To: Suzuki K Poulose , Mathieu Poirier , Alexander Shishkin , Konrad Dybcio , Mike Leach , Rob Herring , Krzysztof Kozlowski CC: Jinlong Mao , Leo Yan , "Greg Kroah-Hartman" , , , , , Tingwei Zhang , Yuanfang Zhang , Trilok Soni , Hao Zhang , , References: <1682586037-25973-1-git-send-email-quic_taozha@quicinc.com> <1682586037-25973-3-git-send-email-quic_taozha@quicinc.com> <444bc278-a3e3-7d99-6020-7c3337371f66@arm.com> From: Tao Zhang In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: fdUvlDcfrRmfVoc5YJTxlOiZhTROTthe X-Proofpoint-ORIG-GUID: fdUvlDcfrRmfVoc5YJTxlOiZhTROTthe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-25_03,2023-05-24_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 spamscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 clxscore=1015 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305250059 X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/23/2023 10:48 PM, Suzuki K Poulose wrote: > On 23/05/2023 11:07, Suzuki K Poulose wrote: >> On 27/04/2023 10:00, Tao Zhang wrote: >>> Read the DSB element size from the device tree. Set the register >>> bit that controls the DSB element size of the corresponding port. >>> >>> Signed-off-by: Tao Zhang >>> --- >>>   drivers/hwtracing/coresight/coresight-core.c |  1 + >>>   drivers/hwtracing/coresight/coresight-tpda.c | 92 >>> +++++++++++++++++++++++++--- >>>   drivers/hwtracing/coresight/coresight-tpda.h |  4 ++ >>>   drivers/hwtracing/coresight/coresight-tpdm.c |  2 +- >>>   include/linux/coresight.h                    |  1 + >>>   5 files changed, 90 insertions(+), 10 deletions(-) >>> >>> diff --git a/drivers/hwtracing/coresight/coresight-core.c >>> b/drivers/hwtracing/coresight/coresight-core.c >>> index 2af416b..f1eacbb 100644 >>> --- a/drivers/hwtracing/coresight/coresight-core.c >>> +++ b/drivers/hwtracing/coresight/coresight-core.c >>> @@ -1092,6 +1092,7 @@ static int coresight_validate_source(struct >>> coresight_device *csdev, >>>       if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && >>>           subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE && >>> +        subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_TPDM && >>>           subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS) { >>>           dev_err(&csdev->dev, "wrong device subtype in %s\n", >>> function); >>>           return -EINVAL; >> >> Please see the comment at the bottom. >> >>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c >>> b/drivers/hwtracing/coresight/coresight-tpda.c >>> index 8d2b9d2..af9c72f 100644 >>> --- a/drivers/hwtracing/coresight/coresight-tpda.c >>> +++ b/drivers/hwtracing/coresight/coresight-tpda.c >>> @@ -21,6 +21,56 @@ >>>   DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda"); >>> +/* Search and read element data size from the TPDM node in >>> + * the devicetree. Each input port of TPDA is connected to >>> + * a TPDM. Different TPDM supports different types of dataset, >>> + * and some may support more than one type of dataset. >>> + * Parameter "inport" is used to pass in the input port number >>> + * of TPDA, and it is set to 0 in the recursize call. >>> + * Parameter "parent" is used to pass in the original call. >>> + */ >>> +static int tpda_set_element_size(struct tpda_drvdata *drvdata, >>> +               struct coresight_device *csdev, int inport, bool >>> parent) > > The name parent is a bit confusing. It could imply parent device ? That > is kind of inverse ? because, parent = true, indicates the parent device > of tpda, which is not true. Could we simply say > > bool match_inport => When true, the dest_port of the connection from the > csdev must match the inport ? And ... > Sure, I will update this in the next patch series. >>> +{ >>> +    static int nr_inport; >>> +    int i; >>> +    static bool tpdm_found; >>> +    struct coresight_device *in_csdev; >>> + >>> +    if (inport > (TPDA_MAX_INPORTS - 1)) >>> +        return -EINVAL; >>> + >>> +    if (parent) { >>> +        nr_inport = inport; >>> +        tpdm_found = false; >>> +    } >>> + >>> +    for (i = 0; i < csdev->pdata->nr_inconns; i++) { >>> +        in_csdev = csdev->pdata->in_conns[i]->src_dev; >>> +        if (!in_csdev) >>> +            break; >>> + >>> +        if (parent) >>> +            if (csdev->pdata->in_conns[i]->dest_port != inport) >>> +                continue; > > The above can become : > >         if (match_inport && >         csdev->pdata->in_conns[i]->dest_port != inport) >         continue; Sure, I will update this in the next patch series. Best, Tao > > Suzuki >