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Thu, 25 May 2023 08:36:22 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34P8aLk8023260 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 25 May 2023 08:36:21 GMT Received: from [10.253.35.57] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Thu, 25 May 2023 01:36:17 -0700 Message-ID: <597533f3-9920-1c48-423d-627812b2972d@quicinc.com> Date: Thu, 25 May 2023 16:36:14 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v4 04/11] coresight-tpdm: Add reset node to TPDM node Content-Language: en-US To: Suzuki K Poulose , Mathieu Poirier , Alexander Shishkin , Konrad Dybcio , Mike Leach , Rob Herring , Krzysztof Kozlowski CC: Jinlong Mao , Leo Yan , "Greg Kroah-Hartman" , , , , , Tingwei Zhang , Yuanfang Zhang , Trilok Soni , Hao Zhang , , References: <1682586037-25973-1-git-send-email-quic_taozha@quicinc.com> <1682586037-25973-5-git-send-email-quic_taozha@quicinc.com> <0947825d-5c2f-0e75-cfe8-ef4c6fa8d502@arm.com> From: Tao Zhang In-Reply-To: <0947825d-5c2f-0e75-cfe8-ef4c6fa8d502@arm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: vfeODFJK6-waFgmJm_3Cw2z-o8yCr3p_ X-Proofpoint-ORIG-GUID: vfeODFJK6-waFgmJm_3Cw2z-o8yCr3p_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-25_04,2023-05-24_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 impostorscore=0 bulkscore=0 priorityscore=1501 lowpriorityscore=0 malwarescore=0 spamscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305250071 X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/23/2023 10:53 PM, Suzuki K Poulose wrote: > On 27/04/2023 10:00, Tao Zhang wrote: >> TPDM device need a node to reset the configurations and status of >> it. This change provides a node to reset the configurations and >> disable the TPDM if it has been enabled. >> >> Signed-off-by: Tao Zhang >> --- >>   .../ABI/testing/sysfs-bus-coresight-devices-tpdm   | 10 ++++++++ >>   drivers/hwtracing/coresight/coresight-tpdm.c       | 27 >> ++++++++++++++++++++++ >>   2 files changed, 37 insertions(+) >> >> diff --git >> a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> index 4a58e64..686bdde 100644 >> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm >> @@ -11,3 +11,13 @@ Description: >>           Accepts only one of the 2 values -  1 or 2. >>           1 : Generate 64 bits data >>           2 : Generate 32 bits data >> + >> +What:        /sys/bus/coresight/devices//reset >> +Date:        March 2023 >> +KernelVersion    6.3 >> +Contact:    Jinlong Mao (QUIC) , Tao Zhang >> (QUIC) >> +Description: >> +        (Write) Reset the dataset of the tpdm, and disable the tpdm. >> + >> +        Accepts only one value -  1. >> +        1 : Reset the dataset of the tpdm >> diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c >> b/drivers/hwtracing/coresight/coresight-tpdm.c >> index 6f8a8ab..2e64cfd 100644 >> --- a/drivers/hwtracing/coresight/coresight-tpdm.c >> +++ b/drivers/hwtracing/coresight/coresight-tpdm.c >> @@ -164,6 +164,32 @@ static int tpdm_datasets_setup(struct >> tpdm_drvdata *drvdata) >>       return 0; >>   } >>   +static ssize_t reset_store(struct device *dev, >> +                      struct device_attribute *attr, >> +                      const char *buf, >> +                      size_t size) >> +{ >> +    int ret = 0; >> +    unsigned long val; >> +    struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); >> + >> +    ret = kstrtoul(buf, 10, &val); >> +    if (ret || val != 1) >> +        return -EINVAL; >> + >> +    spin_lock(&drvdata->spinlock); >> +    tpdm_reset_datasets(drvdata); >> + >> +    spin_unlock(&drvdata->spinlock); >> + >> +    /* Disable tpdm if enabled */ >> +    if (drvdata->enable) >> +        coresight_disable_source(drvdata->csdev, NULL); > > I am not really keen on doing this behind the back. What about the > path of components ? We could simply reject the request when the TPDA > is enabled and let the user alway follow : >     1) Disable the TPDM manually via sysfs >       2) Reset the TPDM. > > So, please remove the disable step here. I will update this in the next patch series. Best, Tao > > Suzuki > > >> + >> +    return size; >> +} >> +static DEVICE_ATTR_WO(reset); >> + >>   /* >>    * value 1: 64 bits test data >>    * value 2: 32 bits test data >> @@ -204,6 +230,7 @@ static ssize_t integration_test_store(struct >> device *dev, >>   static DEVICE_ATTR_WO(integration_test); >>     static struct attribute *tpdm_attrs[] = { >> +    &dev_attr_reset.attr, >>       &dev_attr_integration_test.attr, >>       NULL, >>   }; >