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From:   Mike Leach <mike.leach@linaro.org>
Date:   Thu, 25 May 2023 12:01:44 +0100
Message-ID: <CAJ9a7VghEAKBE0OW-byyNN_9OXgYa_N__9c-3mGDRFVRHjiQrg@mail.gmail.com>
Subject: Re: [PATCH] perf cs-etm: Copy kernel coresight-pmu.h header
To:     James Clark <james.clark@arm.com>
Cc:     linux-perf-users@vger.kernel.org, acme@kernel.org,
        siyanteng@loongson.cn, Suzuki K Poulose <suzuki.poulose@arm.com>,
        Leo Yan <leo.yan@linaro.org>,
        John Garry <john.g.garry@oracle.com>,
        Will Deacon <will@kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@kernel.org>,
        Namhyung Kim <namhyung@kernel.org>,
        Ian Rogers <irogers@google.com>,
        Adrian Hunter <adrian.hunter@intel.com>,
        linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
        linux-arm-kernel@lists.infradead.org
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On Mon, 22 May 2023 at 11:26, James Clark <james.clark@arm.com> wrote:
>
> Copy the kernel version of the header to fix the header diff build
> warning. Some new definitions were only added to the tools side header,
> but these are only used in Perf so move them to a different header.
>
> Signed-off-by: James Clark <james.clark@arm.com>
> ---
>  tools/include/linux/coresight-pmu.h | 13 -------------
>  tools/perf/util/cs-etm.h            | 13 +++++++++++++
>  2 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h
> index cef3b1c25335..51ac441a37c3 100644
> --- a/tools/include/linux/coresight-pmu.h
> +++ b/tools/include/linux/coresight-pmu.h
> @@ -21,19 +21,6 @@
>   */
>  #define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu)  (0x10 + (cpu * 2))
>
> -/* CoreSight trace ID is currently the bottom 7 bits of the value */
> -#define CORESIGHT_TRACE_ID_VAL_MASK    GENMASK(6, 0)
> -
> -/*
> - * perf record will set the legacy meta data values as unused initially.
> - * This allows perf report to manage the decoders created when dynamic
> - * allocation in operation.
> - */
> -#define CORESIGHT_TRACE_ID_UNUSED_FLAG BIT(31)
> -
> -/* Value to set for unused trace ID values */
> -#define CORESIGHT_TRACE_ID_UNUSED_VAL  0x7F
> -
>  /*
>   * Below are the definition of bit offsets for perf option, and works as
>   * arbitrary values for all ETM versions.
> diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h
> index 70cac0375b34..ecca40787ac9 100644
> --- a/tools/perf/util/cs-etm.h
> +++ b/tools/perf/util/cs-etm.h
> @@ -227,6 +227,19 @@ struct cs_etm_packet_queue {
>  #define INFO_HEADER_SIZE (sizeof(((struct perf_record_auxtrace_info *)0)->type) + \
>                           sizeof(((struct perf_record_auxtrace_info *)0)->reserved__))
>
> +/* CoreSight trace ID is currently the bottom 7 bits of the value */
> +#define CORESIGHT_TRACE_ID_VAL_MASK    GENMASK(6, 0)
> +
> +/*
> + * perf record will set the legacy meta data values as unused initially.
> + * This allows perf report to manage the decoders created when dynamic
> + * allocation in operation.
> + */
> +#define CORESIGHT_TRACE_ID_UNUSED_FLAG BIT(31)
> +
> +/* Value to set for unused trace ID values */
> +#define CORESIGHT_TRACE_ID_UNUSED_VAL  0x7F
> +
>  int cs_etm__process_auxtrace_info(union perf_event *event,
>                                   struct perf_session *session);
>  struct perf_event_attr *cs_etm_get_default_config(struct perf_pmu *pmu);
> --
> 2.34.1
>
Reviewed-by: Mike Leach <mike.leach@linaro.org>

-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK