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Date:   Thu, 25 May 2023 20:26:01 +0200
From:   =?iso-8859-1?Q?Ram=F3n?= Nordin Rodriguez 
        <ramon.nordin.rodriguez@ferroamp.se>
To:     Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com>
Cc:     andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk,
        davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
        pabeni@redhat.com, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, horatiu.vultur@microchip.com,
        Woojung.Huh@microchip.com, Nicolas.Ferre@microchip.com,
        Thorsten.Kummermehr@microchip.com
Subject: Re: [PATCH net-next v3 4/6] net: phy: microchip_t1s: fix reset
 complete status handling
Message-ID: <ZG+oOVWuKnwE0IB2@builder>
References: <20230524144539.62618-1-Parthiban.Veerasooran@microchip.com>
 <20230524144539.62618-5-Parthiban.Veerasooran@microchip.com>
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In-Reply-To: <20230524144539.62618-5-Parthiban.Veerasooran@microchip.com>
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> +	/* Read STS2 register and check for the Reset Complete status to do the
> +	 * init configuration. If the Reset Complete is not set, wait for 5us
> +	 * and then read STS2 register again and check for Reset Complete status.
> +	 * Still if it is failed then declare PHY reset error or else proceed
> +	 * for the PHY initial register configuration.
> +	 */
> +	err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2);
> +	if (err < 0)
> +		return err;
> +
> +	if (!(err & LAN867x_RESET_COMPLETE_STS)) {
> +		udelay(5);
> +		err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2);
> +		if (err < 0)
> +			return err;
> +		if (!(err & LAN867x_RESET_COMPLETE_STS)) {
> +			phydev_err(phydev, "PHY reset failed\n");
> +			return -ENODEV;
> +		}
> +	}

This comment explains exactly what the code does, which is also obvious
from reading the code. A meaningful comment would be explaining why the
state can change 5us later.