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Fri, 26 May 2023 14:08:36 +0200 Date: Fri, 26 May 2023 14:08:36 +0200 From: Johan Hovold To: Srinivas Kandagatla Cc: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, agross@kernel.org, konrad.dybcio@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/6] dt-bindings: clock: Add YAML schemas for LPASS AUDIOCC and reset on SC8280XP Message-ID: References: <20230525122930.17141-1-srinivas.kandagatla@linaro.org> <20230525122930.17141-3-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230525122930.17141-3-srinivas.kandagatla@linaro.org> X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 25, 2023 at 01:29:26PM +0100, Srinivas Kandagatla wrote: > The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset > support when it is under the control of Q6DSP. > > Add support for those resets and adds IDs for clients to request the reset. > > Signed-off-by: Srinivas Kandagatla > --- > .../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 11 +++++++++++ > include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 5 +++++ > 2 files changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > index 08a9ae60a365..0557e74d3c3b 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > @@ -21,6 +21,7 @@ properties: > > compatible: > enum: > + - qcom,sc8280xp-lpassaudiocc > - qcom,sc8280xp-lpasscc > > qcom,adsp-pil-mode: > @@ -45,6 +46,16 @@ required: > additionalProperties: false > > examples: > + - | > + #include > + lpass_audiocc: clock-controller@32a9000 { > + compatible = "qcom,sc8280xp-lpassaudiocc"; > + reg = <0x032a9000 0x1000>; > + qcom,adsp-pil-mode; > + #reset-cells = <1>; > + #clock-cells = <1>; Nit: #clock before #reset > + }; > + > - | > #include > lpasscc: clock-controller@33e0000 { > diff --git a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > index df800ea2741c..d190d57fc81a 100644 > --- a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > +++ b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > @@ -6,6 +6,11 @@ > #ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H > #define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H > > +/* LPASS AUDIO CC CSR */ > +#define LPASS_AUDIO_SWR_RX_CGCR 0 > +#define LPASS_AUDIO_SWR_WSA_CGCR 1 > +#define LPASS_AUDIO_SWR_WSA2_CGCR 2 > + > /* LPASS TCSR */ > #define LPASS_AUDIO_SWR_TX_CGCR 0 Should you have different prefixes for the CSR and TCSR defines? Looks good to me otherwise: Reviewed-by: Johan Hovold