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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Linus Torvalds <torvalds@linux-foundation.org>
Cc:     linux-kernel@vger.kernel.org, x86@kernel.org
Subject: [GIT pull] x86/urgent for 6.4-rc4
References: <168526035526.3457722.14103350194452732675.tglx@xen13>
Message-ID: <168526036137.3457722.17274974250309862601.tglx@xen13>
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Date:   Sun, 28 May 2023 09:53:02 +0200 (CEST)
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Linus,

please pull the latest x86/urgent branch from:

   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-urgent-2023-=
05-28

up to:  edc0a2b59576: x86/topology: Fix erroneous smp_num_siblings on Intel H=
ybrid platforms


A single fix for x86:

 - Prevent a bogus setting for the number of HT siblings, which is caused
   by the CPUID evaluation trainwreck of X86. That recomputes the value
   for each CPU, so the last CPU "wins". That can cause completely bogus
   sibling values.

Thanks,

	tglx

------------------>
Zhang Rui (1):
      x86/topology: Fix erroneous smp_num_siblings on Intel Hybrid platforms


 arch/x86/kernel/cpu/topology.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c
index 5e868b62a7c4..0270925fe013 100644
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -79,7 +79,7 @@ int detect_extended_topology_early(struct cpuinfo_x86 *c)
 	 * initial apic id, which also represents 32-bit extended x2apic id.
 	 */
 	c->initial_apicid =3D edx;
-	smp_num_siblings =3D LEVEL_MAX_SIBLINGS(ebx);
+	smp_num_siblings =3D max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
 #endif
 	return 0;
 }
@@ -109,7 +109,8 @@ int detect_extended_topology(struct cpuinfo_x86 *c)
 	 */
 	cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
 	c->initial_apicid =3D edx;
-	core_level_siblings =3D smp_num_siblings =3D LEVEL_MAX_SIBLINGS(ebx);
+	core_level_siblings =3D LEVEL_MAX_SIBLINGS(ebx);
+	smp_num_siblings =3D max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
 	core_plus_mask_width =3D ht_mask_width =3D BITS_SHIFT_NEXT_LEVEL(eax);
 	die_level_siblings =3D LEVEL_MAX_SIBLINGS(ebx);
 	pkg_mask_width =3D die_plus_mask_width =3D BITS_SHIFT_NEXT_LEVEL(eax);