Received: by 2002:a05:6358:3188:b0:123:57c1:9b43 with SMTP id q8csp2681451rwd; Sun, 28 May 2023 22:05:54 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4bFp9xyniJ9c5bjFf97D0RvO1C27H3PJW5RYU/t0974LECLezxNcJEu9zD/F08/21a+jQT X-Received: by 2002:a17:90a:4a95:b0:256:21a9:8f82 with SMTP id f21-20020a17090a4a9500b0025621a98f82mr9630070pjh.16.1685336753777; Sun, 28 May 2023 22:05:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685336753; cv=none; d=google.com; s=arc-20160816; b=mxscHJckAnGyuePJwZlamMYHzxSlRAdlfhPYIEo2LJHuKXzkcNKprY3TvX+vYSbk3R 0xoCIvvJ1e4nTF/eA+S9rhhOj2YHqRIaUPPVQUoj9R7UtBMPPwKgUCABN4UwMZp4dB5Y QilVF9DAI90HMEwisG9jpg0hfbYQaLQIpSWsq7XXL+wVQ3h5toVv8qq29mLRDtiVxnoN DumKQkl2m+5PojhLQdwEA2pd9Uz+FYZ/NHzB6K56GcdDvgDNufFG1Lje72I0US1n4uOw bCMjvvw/5sKqE2MwF8PIAnmafbDT5JLZgnGau8AQ13OmuhciIT7VC2v2ci1wsq8Jp9NK I4QQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qyKjYK+ivi4TM2FuYAWTbmosEkHXvOhABfdpK+6Ddhk=; b=KuaKXZXkUJyPI3eJa38fNVq79Krp5A0u2pUWy6xW9cRFgymGVi3yJ6bPVm9qHoR2yl w5l9wpJiZkz49dk+n+EmoRLMJtqdI50bQlwZb25msOih4j0bSNrp8oWaCKkQGWYcamDY RbolbL0+PcaktFA2uR1J8mKZEDfTANWnYAYrPnPBY8CPMCYnH77tVfY3qyL8C2VrPK41 QSbsbfb4Tu3Iy6PiqZiR2cZ1ZPhSpV+qV6PFAC+mbW6F/7XQ+J3ipUPixm+hlNsBOou7 I5LeRlh5H2X9LwAxuFKI7ZllnqBDSTSuBky05OyFG21sUvi8zCwMhivZGoookpGs41FH nQAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=LIiwQLfl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gz24-20020a17090b0ed800b0024e2c5e3a4asi5162748pjb.132.2023.05.28.22.05.41; Sun, 28 May 2023 22:05:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=LIiwQLfl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231820AbjE2EYb (ORCPT + 99 others); Mon, 29 May 2023 00:24:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231764AbjE2EXq (ORCPT ); Mon, 29 May 2023 00:23:46 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF18C10F5; Sun, 28 May 2023 21:21:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685334109; x=1716870109; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8cajYbufCUJ/ycOG/oMyUPTHuTwAHRUPPHn1xv6CtNQ=; b=LIiwQLflXv3N+eRXNjMK6BShTm2lZfz6UN7qc7OSh02DF+gqj26hh/KP ksme4N6BzMay6u8spiT/xddn5yrX/glK4CaGH2Y2Kmp4qXq5vsshJoE8L VQDQHwnX/k+RqSnJgJ7uRSMMcVaNhWn+3QzbLdmSoSE99zBZ0UgNLaUYu G9vUQq9jg6HphOa2ppwPAJuyb7t2VcYpg893Hj2Tu4VA3rhMG7wA7zbDG 3s+RyQABOzgA4KTh4WMYFOi4roUEFgTbzIHzsf/HlcKY0QuqQaKw1P9Oc n8AiK0etAeSDO/Rnhkk68jvkeDvSFUVOZB00xfMPPxXJExolF5VOGWHMw g==; X-IronPort-AV: E=McAfee;i="6600,9927,10724"; a="418094406" X-IronPort-AV: E=Sophos;i="6.00,200,1681196400"; d="scan'208";a="418094406" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2023 21:21:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10724"; a="683419386" X-IronPort-AV: E=Sophos;i="6.00,200,1681196400"; d="scan'208";a="683419386" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2023 21:21:03 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack , Kai Huang , Zhi Wang , chen.bo@intel.com Subject: [PATCH v14 030/113] KVM: Allow page-sized MMU caches to be initialized with custom 64-bit values Date: Sun, 28 May 2023 21:19:12 -0700 Message-Id: <1e7ca2f9c4f9e9d93170a32c58c2426a73eec8a0.1685333727.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Christopherson Add support to MMU caches for initializing a page with a custom 64-bit value, e.g. to pre-fill an entire page table with non-zero PTE values. The functionality will be used by x86 to support Intel's TDX, which needs to set bit 63 in all non-present PTEs in order to prevent !PRESENT page faults from getting reflected into the guest (Intel's EPT Violation #VE architecture made the less than brilliant decision of having the per-PTE behavior be opt-out instead of opt-in). Signed-off-by: Sean Christopherson Signed-off-by: Isaku Yamahata --- include/linux/kvm_types.h | 1 + virt/kvm/kvm_main.c | 16 ++++++++++++++-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/include/linux/kvm_types.h b/include/linux/kvm_types.h index 6f4737d5046a..4932bc90a0a0 100644 --- a/include/linux/kvm_types.h +++ b/include/linux/kvm_types.h @@ -93,6 +93,7 @@ struct gfn_to_pfn_cache { struct kvm_mmu_memory_cache { gfp_t gfp_zero; gfp_t gfp_custom; + u64 init_value; struct kmem_cache *kmem_cache; int capacity; int nobjs; diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c index 7078698924bb..0d8edc686e9d 100644 --- a/virt/kvm/kvm_main.c +++ b/virt/kvm/kvm_main.c @@ -384,12 +384,17 @@ static void kvm_flush_shadow_all(struct kvm *kvm) static inline void *mmu_memory_cache_alloc_obj(struct kvm_mmu_memory_cache *mc, gfp_t gfp_flags) { + void *page; + gfp_flags |= mc->gfp_zero; if (mc->kmem_cache) return kmem_cache_alloc(mc->kmem_cache, gfp_flags); - else - return (void *)__get_free_page(gfp_flags); + + page = (void *)__get_free_page(gfp_flags); + if (page && mc->init_value) + memset64(page, mc->init_value, PAGE_SIZE / sizeof(mc->init_value)); + return page; } int __kvm_mmu_topup_memory_cache(struct kvm_mmu_memory_cache *mc, int capacity, int min) @@ -404,6 +409,13 @@ int __kvm_mmu_topup_memory_cache(struct kvm_mmu_memory_cache *mc, int capacity, if (WARN_ON_ONCE(!capacity)) return -EIO; + /* + * Custom init values can be used only for page allocations, + * and obviously conflict with __GFP_ZERO. + */ + if (WARN_ON_ONCE(mc->init_value && (mc->kmem_cache || mc->gfp_zero))) + return -EIO; + mc->objects = kvmalloc_array(sizeof(void *), capacity, gfp); if (!mc->objects) return -ENOMEM; -- 2.25.1