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Date:   Mon, 29 May 2023 13:12:55 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Claudiu Beznea <claudiu.beznea@microchip.com>
CC:     <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <conor+dt@kernel.org>, <nicolas.ferre@microchip.com>,
        <alexandre.belloni@bootlin.com>, <daniel.lezcano@linaro.org>,
        <tglx@linutronix.de>, <wim@linux-watchdog.org>,
        <linux@roeck-us.net>, <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <linux-watchdog@vger.kernel.org>
Subject: Re: [PATCH v2 1/4] ARM: dts: at91: sama7g5: keep only
 microchip,sam9x60-pit64b compatible for pit64b
Message-ID: <20230529-boxcar-magma-ecce8cf747e4@wendy>
References: <20230529062604.1498052-1-claudiu.beznea@microchip.com>
 <20230529062604.1498052-2-claudiu.beznea@microchip.com>
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Hey Claudiu,

On Mon, May 29, 2023 at 09:26:01AM +0300, Claudiu Beznea wrote:
> SAM9X60 and SAMA7G5 PIT64Bs are 1 to 1 compatible. Thus, there is no
> need for specific compatible string on SAMA7G5.

Generally, soc-specific compatibles are something that we want people to
add, not remove!

Cheers,
Conor.

>=20
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
>  arch/arm/boot/dts/sama7g5.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.d=
tsi
> index 886b6209a71e..500b00508621 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -610,7 +610,7 @@ eic: interrupt-controller@e1628000 {
>  		};
> =20
>  		pit64b0: timer@e1800000 {
> -			compatible =3D "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
> +			compatible =3D "microchip,sam9x60-pit64b";
>  			reg =3D <0xe1800000 0x4000>;
>  			interrupts =3D <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks =3D <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>;
> @@ -618,7 +618,7 @@ pit64b0: timer@e1800000 {
>  		};
> =20
>  		pit64b1: timer@e1804000 {
> -			compatible =3D "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
> +			compatible =3D "microchip,sam9x60-pit64b";
>  			reg =3D <0xe1804000 0x4000>;
>  			interrupts =3D <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks =3D <&pmc PMC_TYPE_PERIPHERAL 71>, <&pmc PMC_TYPE_GCK 71>;
> --=20
> 2.34.1
>=20

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