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Content-Language: en-US To: Chevron Li , ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: shirley.her@bayhubtech.com, xiaoguang.yu@bayhubtech.com, shaper.liu@bayhubtech.com, justin.wang@bayhubtech.com, Chevron Li References: <20230523111114.18124-1-chevron_li@126.com> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <20230523111114.18124-1-chevron_li@126.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/05/23 14:11, Chevron Li wrote: > From: Chevron Li > > Bayhub SD host has hardware limitation: > 1.The upper 32bit address is inhibited to be written at SD Host Register > [03E][13]=0 (32bits addressing) mode, is admitted to be written only at > SD Host Register [03E][13]=1 (64bits addressing) mode. > 2.Because of above item#1, need to configure SD Host Register [03E][13] to > 1(64bits addressing mode) before set 64bit ADMA system address's higher > 32bits SD Host Register [05F~05C] if 64 bits addressing mode is used. > > The hardware limitation is reasonable for below reasons: > 1.Normal flow should set DMA working mode first, then do > DMA-transfer-related configuration, such as system address. > 2.The hardware limitation may avoid the software to configure wrong higher > 32bit address at 32bits addressing mode although it is redundant. > > The change that set 32bits/64bits addressing mode before set ADMA address, > has no side-effect to other host IPs for below reason: > The setting order is reasonable and standard: DMA Mode setting first and > then DMA address setting. It meets all DMA setting sequence. > > Signed-off-by: Chevron Li It should be OK. Acked-by: Adrian Hunter > --- > Change in V1: > Set dma mode configure before set dma address > --- > drivers/mmc/host/sdhci.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index 3241916141d7..ff41aa56564e 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -1167,6 +1167,8 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) > } > } > > + sdhci_config_dma(host); > + > if (host->flags & SDHCI_REQ_USE_DMA) { > int sg_cnt = sdhci_pre_dma_transfer(host, data, COOKIE_MAPPED); > > @@ -1186,8 +1188,6 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) > } > } > > - sdhci_config_dma(host); > - > if (!(host->flags & SDHCI_REQ_USE_DMA)) { > int flags; > > > base-commit: cc3c44c9fda264c6d401be04e95449a57c1231c6