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Message-ID: <091dcf39-b186-056d-4bdf-d4ac5d24682e@gmail.com>
Date:   Mon, 29 May 2023 17:16:13 +0200
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Subject: Re: [PATCH v2 4/4] arm64: dts: mediatek: cherry: Enable PCI-Express
 ports for WiFi
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To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, kernel@collabora.com,
        Chen-Yu Tsai <wenst@chromium.org>
References: <20230424112523.1436926-1-angelogioacchino.delregno@collabora.com>
 <20230424112523.1436926-5-angelogioacchino.delregno@collabora.com>
From:   Matthias Brugger <matthias.bgg@gmail.com>
In-Reply-To: <20230424112523.1436926-5-angelogioacchino.delregno@collabora.com>
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Precedence: bulk


On 24/04/2023 13:25, AngeloGioacchino Del Regno wrote:
> On the Cherry platform, a MT7621 WiFi+Bluetooth combo is connected
> over PCI-Express (for WiFi) and USB (for BT): enable the PCIe ports
> to enable enumerating this chip.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>

Applied, thanks

> ---
>   .../boot/dts/mediatek/mt8195-cherry.dtsi      | 25 +++++++++++++++++++
>   1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index adbda4dccdd5..eca5df85fe33 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -565,6 +565,13 @@ flash@0 {
>   	};
>   };
>   
> +&pcie1 {
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie1_pins_default>;
> +};
> +
>   &pio {
>   	mediatek,rsel-resistance-in-si-unit;
>   	pinctrl-names = "default";
> @@ -959,6 +966,24 @@ pins-vreg-en {
>   		};
>   	};
>   
> +	pcie0_pins_default: pcie0-default-pins {
> +		pins-bus {
> +			pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
> +				 <PINMUX_GPIO20__FUNC_PERSTN>,
> +				 <PINMUX_GPIO21__FUNC_CLKREQN>;
> +				 bias-pull-up;
> +		};
> +	};
> +
> +	pcie1_pins_default: pcie1-default-pins {
> +		pins-bus {
> +			pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
> +				 <PINMUX_GPIO23__FUNC_CLKREQN_1>,
> +				 <PINMUX_GPIO24__FUNC_WAKEN_1>;
> +				 bias-pull-up;
> +		};
> +	};
> +
>   	pio_default: pio-default-pins {
>   		pins-wifi-enable {
>   			pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;