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Date:   Mon, 29 May 2023 17:58:20 +0200
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Subject: Re: [PATCH v1 4/7] arm64: dts: mt7986: add PWM
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To:     Frank Wunderlich <linux@fw-web.de>,
        linux-mediatek@lists.infradead.org
Cc:     Frank Wunderlich <frank-w@public-files.de>,
        Jonathan Cameron <jic23@kernel.org>,
        Lars-Peter Clausen <lars@metafoo.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>,
        Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
        "Hui.Liu" <hui.liu@mediatek.com>,
        Zhiyong Tao <zhiyong.tao@mediatek.com>,
        Andrew-CT Chen <andrew-ct.chen@mediatek.com>,
        Lala Lin <lala.lin@mediatek.com>, linux-iio@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Daniel Golle <daniel@makrotopia.org>
References: <20230421132047.42166-1-linux@fw-web.de>
 <20230421132047.42166-5-linux@fw-web.de>
From:   Matthias Brugger <matthias.bgg@gmail.com>
In-Reply-To: <20230421132047.42166-5-linux@fw-web.de>
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On 21/04/2023 15:20, Frank Wunderlich wrote:
> From: Daniel Golle <daniel@makrotopia.org>
> 
> This adds pwm node to mt7986.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>

Applied, thanks

> ---
>   arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> index a38965e23825..a409d5e845c2 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> @@ -240,6 +240,20 @@ crypto: crypto@10320000 {
>   			status = "disabled";
>   		};
>   
> +		pwm: pwm@10048000 {
> +			compatible = "mediatek,mt7986-pwm";
> +			reg = <0 0x10048000 0 0x1000>;
> +			#clock-cells = <1>;
> +			#pwm-cells = <2>;
> +			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&topckgen CLK_TOP_PWM_SEL>,
> +				 <&infracfg CLK_INFRA_PWM_STA>,
> +				 <&infracfg CLK_INFRA_PWM1_CK>,
> +				 <&infracfg CLK_INFRA_PWM2_CK>;
> +			clock-names = "top", "main", "pwm1", "pwm2";
> +			status = "disabled";
> +		};
> +
>   		uart0: serial@11002000 {
>   			compatible = "mediatek,mt7986-uart",
>   				     "mediatek,mt6577-uart";