Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <cabc40f3-d1cb-bdd0-bd96-1a51cb861579@gmail.com>
Date:   Mon, 29 May 2023 18:08:56 +0200
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101
 Thunderbird/102.10.0
Subject: Re: [PATCH 0/2] MT8192/95: Set correct MSDCPLL rate
Content-Language: en-US, ca-ES, es-ES
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        conor+dt@kernel.org, weiyi.lu@mediatek.com, ikjn@chromium.org,
        chun-jie.chen@mediatek.com, tinghan.shen@mediatek.com,
        seiya.wang@mediatek.com, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, kernel@collabora.com
References: <20230522093002.75137-1-angelogioacchino.delregno@collabora.com>
From:   Matthias Brugger <matthias.bgg@gmail.com>
In-Reply-To: <20230522093002.75137-1-angelogioacchino.delregno@collabora.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 22/05/2023 11:30, AngeloGioacchino Del Regno wrote:
> This series improves both stability/reliability and performance for
> eMMC and SD cards on MT8192 and MT8195, where the PLL may be set at
> a sub-optimal rate from the bootloader.
> 
> This was tested on MT8192 Asurada Spherion and MT8195 Cherry Tomato
> Chromebooks.
> 
> AngeloGioacchino Del Regno (2):
>    arm64: dts: mediatek: mt8192: Make sure MSDCPLL's rate is 400MHz
>    arm64: dts: mediatek: mt8195: Make sure MSDCPLL's rate is 400MHz
> 
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++
>   2 files changed, 4 insertions(+)
> 

Whole series applied, thanks a lot!
Matthias