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Date:   Tue, 30 May 2023 10:46:37 +0100
Message-ID: <868rd6cfsy.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Geert Uytterhoeven <geert@linux-m68k.org>
Cc:     Douglas Anderson <dianders@chromium.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Allen-KH Cheng <allen-kh.cheng@mediatek.com>,
        linux-mediatek@lists.infradead.org,
        Eddie Huang <eddie.huang@mediatek.com>,
        Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>, wenst@chromium.org,
        yidilin@chromium.org, Tinghan Shen <tinghan.shen@mediatek.com>,
        jwerner@chromium.org, Weiyi Lu <weiyi.lu@mediatek.com>,
        Ben Ho <Ben.Ho@mediatek.com>,
        Seiya Wang <seiya.wang@mediatek.com>,
        linux-kernel@vger.kernel.org,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v2 2/5] irqchip/gic-v3: Disable pseudo NMIs on Mediatek devices w/ firmware issues
In-Reply-To: <CAMuHMdWM_t7uQqkesM3fnSK7THrmLszA7U54==A0-98xPH90Bw@mail.gmail.com>
References: <20230515131353.v2.cover@dianders>
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        <CAMuHMdWM_t7uQqkesM3fnSK7THrmLszA7U54==A0-98xPH90Bw@mail.gmail.com>
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On Tue, 30 May 2023 09:29:02 +0100,
Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>=20
> Hi Douglas,
>=20
> On Mon, May 15, 2023 at 10:16=E2=80=AFPM Douglas Anderson <dianders@chrom=
ium.org> wrote:
> > Some Chromebooks with Mediatek SoCs have a problem where the firmware
> > doesn't properly save/restore certain GICR registers. Newer
> > Chromebooks should fix this issue and we may be able to do firmware
> > updates for old Chromebooks. At the moment, the only known issue with
> > these Chromebooks is that we can't enable "pseudo NMIs" since the
> > priority register can be lost. Enabling "pseudo NMIs" on Chromebooks
> > with the problematic firmware causes crashes and freezes.
> >
> > Let's detect devices with this problem and then disable "pseudo NMIs"
> > on them. We'll detect the problem by looking for the presence of the
> > "mediatek,broken-save-restore-fw" property in the GIC device tree
> > node. Any devices with fixed firmware will not have this property.
> >
> > Our detection plan works because we never bake a Chromebook's device
> > tree into firmware. Instead, device trees are always bundled with the
> > kernel. We'll update the device trees of all affected Chromebooks and
> > then we'll never enable "pseudo NMI" on a kernel that is bundled with
> > old device trees. When a firmware update is shipped that fixes this
> > issue it will know to patch the device tree to remove the property.
> >
> > In order to make this work, the quick detection mechanism of the GICv3
> > code is extended to be able to look for properties in addition to
> > looking at "compatible".
> >
> > Reviewed-by: Julius Werner <jwerner@chromium.org>
> > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > ---
> >
> > Changes in v2:
> > - mediatek,gicr-save-quirk =3D> mediatek,broken-save-restore-fw
>=20
> Thanks for your patch, which is now commit 44bd78dd2b8897f5
> ("irqchip/gic-v3: Disable pseudo NMIs on Mediatek devices w/
> firmware issues") in v6.4-rc4.
>=20
> This causes enabling an unrelated workaround on R-Car V4H:
>=20
>     GIC: enabling workaround for GICv3: Cavium erratum 38539
>=20
> > --- a/drivers/irqchip/irq-gic-common.c
> > +++ b/drivers/irqchip/irq-gic-common.c
> > @@ -16,7 +16,11 @@ void gic_enable_of_quirks(const struct device_node *=
np,
> >                           const struct gic_quirk *quirks, void *data)
> >  {
> >         for (; quirks->desc; quirks++) {
> > -               if (!of_device_is_compatible(np, quirks->compatible))
> > +               if (quirks->compatible &&
> > +                   !of_device_is_compatible(np, quirks->compatible))
> > +                       continue;
> > +               if (quirks->property &&
> > +                   !of_property_read_bool(np, quirks->property))
> >                         continue;
>=20
> Presumably the loop should continue if none of quirks-compatible
> or quirks->property is set?

Indeed, thanks for pointing that out. Can you give the following hack
a go (compile tested only)?

diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-com=
mon.c
index de47b51cdadb..7b591736ab58 100644
--- a/drivers/irqchip/irq-gic-common.c
+++ b/drivers/irqchip/irq-gic-common.c
@@ -16,6 +16,8 @@ void gic_enable_of_quirks(const struct device_node *np,
 			  const struct gic_quirk *quirks, void *data)
 {
 	for (; quirks->desc; quirks++) {
+		if (!quirks->compatible && !quirks->property)
+			continue;
 		if (quirks->compatible &&
 		    !of_device_is_compatible(np, quirks->compatible))
 			continue;

If that works for you, I'll queue it ASAP.

Cheers,

	M.

--=20
Without deviation from the norm, progress is not possible.