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Tue, 30 May 2023 03:55:15 -0700 (PDT) Received: from [10.66.61.39] ([209.132.188.80]) by smtp.gmail.com with ESMTPSA id f12-20020a170902ce8c00b0019aaab3f9d7sm9978616plg.113.2023.05.30.03.55.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 May 2023 03:55:15 -0700 (PDT) Message-ID: <07664387-ad45-02ec-8d67-b42f38b86191@redhat.com> Date: Tue, 30 May 2023 18:55:10 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation Content-Language: en-US To: Mark Brown , Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev References: <20230419-arm64-syreg-gen-v2-0-4c6add1f6257@kernel.org> <20230419-arm64-syreg-gen-v2-5-4c6add1f6257@kernel.org> From: Shaoqin Huang In-Reply-To: <20230419-arm64-syreg-gen-v2-5-4c6add1f6257@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/24/23 02:37, Mark Brown wrote: > Convert OSDTRRX_EL1 to automatic generation as per DDI0601 2023-03, no > functional changes. > Reviewed-by: Shaoqin Huang > Signed-off-by: Mark Brown > --- > arch/arm64/include/asm/sysreg.h | 1 - > arch/arm64/tools/sysreg | 5 +++++ > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 1901b676d7c6..da954a6eba24 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -134,7 +134,6 @@ > #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3) > #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3) > > -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2) > #define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2) > #define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2) > #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4) > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > index b0aefdf9ed34..e4653248dcac 100644 > --- a/arch/arm64/tools/sysreg > +++ b/arch/arm64/tools/sysreg > @@ -48,6 +48,11 @@ > # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration > # item ACCDATA) though it may be more taseful to do something else. > > +Sysreg OSDTRRX_EL1 2 0 0 0 2 > +Res0 63:32 > +Field 31:0 DTRRX > +EndSysreg > + > Sysreg MDCCINT_EL1 2 0 0 2 0 > Res0 63:31 > Field 30 RX > -- Shaoqin