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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h6-20020a170902ac8600b001ac5dd95bc5si1761094plr.476.2023.05.30.05.19.04; Tue, 30 May 2023 05:19:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@flygoat.com header.s=fm2 header.b=lkluiL6H; dkim=pass header.i=@messagingengine.com header.s=fm1 header.b=C3Row8K9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=flygoat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232086AbjE3Lz4 (ORCPT + 99 others); Tue, 30 May 2023 07:55:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232112AbjE3Lzw (ORCPT ); Tue, 30 May 2023 07:55:52 -0400 Received: from wout4-smtp.messagingengine.com (wout4-smtp.messagingengine.com [64.147.123.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C21D6B0; Tue, 30 May 2023 04:55:16 -0700 (PDT) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 1CE5632002F9; Tue, 30 May 2023 07:55:02 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Tue, 30 May 2023 07:55:02 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flygoat.com; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to; s=fm2; t= 1685447701; x=1685534101; bh=2tvvKDbF1hK6YbztPVPIPE2ZY0lY840KyG/ h2NOWuoo=; b=lkluiL6H+vITqeODD7XEF20W3kCNsR/E7ufYbbIIuAAuDMW2OD/ 4/EIG6JSPsrzaB6KmB7A5oZDyc/axoLOjNyvcmuPQgYZql/Suw+kYiia/VmIJ5XH 1bmU5G1Z9eOG0eteBnaECL6tSKzypBe3cppxmjzcWLEHIZQDMwhFCmdLmEBdOefV gOBB6IvIaLfLrb0Wx084SvMlEPMpoVtoX/O1Ko3L/ozWVb4nEvKs2ak+C+4ZAitR +YHk6Ep9+UHD6LAGcdCUj9QpUyQJSxqQXT+s+7En0oM4hwMcrtWkg2ff1qs4R8EJ +CQOhzE9YFSav4EhIOyyWw5sEc1bz4/FUNg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t= 1685447701; x=1685534101; bh=2tvvKDbF1hK6YbztPVPIPE2ZY0lY840KyG/ h2NOWuoo=; b=C3Row8K9n+zp6VYbQ3HDJeeBsatAtoC351VOzcJEZizfnfqHnfN ayJUZ+YaUt/WRluCT9qAiXl/B1GWI0BBDElgNTh7usVsyTMlTrsPWCB/P80ZhGTF KPsO2dge+EGb/0IwCzMga8BfKl7eGMifxwRVVI1sfnaAliEgndQx2U+0b+LgsUN+ BWbvH1PBeBxEaXMNm/zbGCsVSrX5SyKtAncwqaAb/aikTiYkKM+mEShBrG0eeV0q PeDaZI8bh9YQd0llMS9OB/ok22Ri9Ggkyiub1xh2Gd+yRRB0+Bd6aQwOe6j3d/sH 1ImaUt7SDJS5kUPhmKNLMUouS7NvbdPxn1g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrfeekjedggeegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurheptggguffhjgffvefgkfhfvffosehtqhhmtdhhtdejnecuhfhrohhmpeflihgr gihunhcujggrnhhguceojhhirgiguhhnrdihrghnghesfhhlhihgohgrthdrtghomheqne cuggftrfgrthhtvghrnhepuddtjeffteetfeekjeeiheefueeigeeutdevieejveeihfff ledvgfduiefhvddtnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilh hfrhhomhepjhhirgiguhhnrdihrghnghesfhhlhihgohgrthdrtghomh X-ME-Proxy: Feedback-ID: ifd894703:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 30 May 2023 07:55:00 -0400 (EDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3731.500.231\)) Subject: Re: [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150 From: Jiaxun Yang In-Reply-To: Date: Tue, 30 May 2023 12:54:49 +0100 Cc: Paul Cercueil , "linux-mips@vger.kernel.org" , linux-kernel@vger.kernel.org, Thomas Bogendoerfer Content-Transfer-Encoding: quoted-printable Message-Id: References: <20230529135245.4085-1-jiaxun.yang@flygoat.com> <684C1A48-C743-4045-AF12-B0846FCE8EBE@flygoat.com> To: "Maciej W. Rozycki" X-Mailer: Apple Mail (2.3731.500.231) X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > 2023=E5=B9=B45=E6=9C=8830=E6=97=A5 12:07=EF=BC=8CMaciej W. Rozycki = =E5=86=99=E9=81=93=EF=BC=9A >=20 > On Tue, 30 May 2023, Jiaxun Yang wrote: >=20 >>>> M5150 and P5600 are two MIPS32R5 kernels, however as MIPS32R5 is >>>> backward compatible with MIPS32R2 there is no reason to forbid >>>> M5150 and P5600 on MIPS32R2 kernel. >>>=20 >>> What problem are you trying to solve? The CONFIG_SYS_HAS_CPU_* = settings=20 >>> denote overall platform's support for the given CPU and have nothing = to do=20 >>> with what architecture level a given kernel has been configured for. = You=20 >>> do need to get the settings right for your platform, just as you do = in=20 >>> 2/2, but this 1/2 part looks wrong to me. >>=20 >> Well the universal target is to allow R2 generic kernel to run on R5 = CPUs. >> As R5 is backward compatible we can just have one universal kernel = binary. >=20 > Sure, but this change is not needed for it. You just need to declare=20= > which ISA revisions your platform supports and leave `__get_cpu_type'=20= > alone. It has worked like that for a decade now. I=E2=80=99m afraid it won=E2=80=99t work as you expected. Actually I ran into a problem that `case CPU_P5600` in c-r4k.c is = optimised out by compiler, because the codepath is marked as unreachable. Thanks - Jiaxun >=20 > Back in the day I used to run R1 kernels on R2 hardware myself. And=20= > maybe MIPS IV on R1 even, as we had MIPS Malta CPU modules with both = MIPS=20 > IV devices (QED RM5261/RM7061) and MIPS64r1 devices (MIPS = 5Kc/20Kc/25Kf)=20 > and switching the kernel when swapping modules was a nuisance. The = Malta=20 > config still supports these devices although some may not exist = anymore. >=20 > Maciej